gpu: nvgpu: MISRA fixes for composite expressions

MISRA rules 10.6, 10.7, and 10.8 prevent mixing of types in composite
expressions. Resolve these violations by casting variables/constants to
the appropriate types.

Jira NVGPU-850
Jira NVGPU-853
Jira NVGPU-851

Change-Id: If6db312187211bc428cf465929082118565dacf4
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1931156
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Adeel Raza
2018-10-23 13:24:39 -07:00
committed by mobile promotions
parent a733659f19
commit dc37ca4559
49 changed files with 184 additions and 150 deletions

View File

@@ -31,8 +31,8 @@
unsigned long __nvgpu_posix_ffs(unsigned long word)
{
return (__builtin_ffsl(word) - 1) &
((sizeof(unsigned long) * 8UL) - 1UL);
return ((unsigned long)__builtin_ffsl(word) - 1UL) &
(((unsigned long)sizeof(unsigned long) * 8UL) - 1UL);
}
unsigned long __nvgpu_posix_fls(unsigned long word)