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gpu: nvgpu: Move PMU code to common/pmu
Move code interfacing with PMU tasks to common/pmu. JIRA NVGPU-961 Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1950991 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
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drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
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/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_VOLT_DEV_H
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#define NVGPU_VOLT_DEV_H
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#include <nvgpu/boardobj.h>
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#include <nvgpu/boardobjgrp.h>
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#include <nvgpu/pmuif/ctrlvolt.h>
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#define VOLTAGE_TABLE_MAX_ENTRIES_ONE 1U
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#define VOLTAGE_TABLE_MAX_ENTRIES 256U
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struct voltage_device {
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struct boardobj super;
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u8 volt_domain;
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u8 i2c_dev_idx;
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u32 switch_delay_us;
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u32 num_entries;
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struct voltage_device_entry *pentry[VOLTAGE_TABLE_MAX_ENTRIES];
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struct voltage_device_entry *pcurr_entry;
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u8 rsvd_0;
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u8 rsvd_1;
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u8 operation_type;
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u32 voltage_min_uv;
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u32 voltage_max_uv;
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u32 volt_step_uv;
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};
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struct voltage_device_entry {
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u32 voltage_uv;
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};
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/*!
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* Extends VOLTAGE_DEVICE providing attributes specific to PWM controllers.
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*/
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struct voltage_device_pwm {
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struct voltage_device super;
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s32 voltage_base_uv;
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s32 voltage_offset_scale_uv;
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enum nv_pmu_pmgr_pwm_source source;
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u32 raw_period;
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};
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struct voltage_device_pwm_entry {
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struct voltage_device_entry super;
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u32 duty_cycle;
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};
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/* PWM end */
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#endif /* NVGPU_VOLT_DEV_H */
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