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gpu: nvgpu: add nvgpu-next infrastructure

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* As of now, working on multiple chip bringup in nvgpu-next repo has
   an issue because we end with losing control on source code (hard to
   find which part of the code belongs to which chip) and it's valuable
   history this affects chip migration on release.

 * To support multiple chip bringup simultaneously, we need new
   guidelines to avoid losing control on source code and make migration
   easier. This change adds links to nvgpu-next repo.

 * Updated return code to ENODEV for consistency
 * Updated ACR unittest to work with ENODEV return code

NOTE:
     These are the initial set of infrastructure changes, guidelines
     will evolve, and source code will get updated accordingly.

     Based on future chip features, Which part of the source code falls
     under nvgpu-next repo is decided.

JIRA NVGPU-6574

Change-Id: I81827e35d189c55554df00e255b527a4473e0338
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2556793
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kadamati
2021-07-09 20:57:49 +05:30
committed by mobile promotions
parent 9ffcb0fade
commit dd9b4364aa
11 changed files with 120 additions and 28 deletions
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24
drivers/gpu/nvgpu/common/pmu/perfmon/pmu_perfmon.c
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@@ -40,6 +40,10 @@
#include "pmu_perfmon_sw_ga10b.h"
#endif
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include <nvgpu_next_perfmon.h>
#endif
static u8 get_perfmon_id(struct nvgpu_pmu *pmu)
{
struct gk20a *g = pmu->g;
@@ -60,10 +64,17 @@ static u8 get_perfmon_id(struct nvgpu_pmu *pmu)
unit_id = PMU_UNIT_PERFMON_T18X;
break;
default:
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
unit_id = nvgpu_next_get_perfmon_id(pmu);
#else
unit_id = PMU_UNIT_INVALID;
#endif
break;
}
if (unit_id == PMU_UNIT_INVALID) {
nvgpu_err(g, "no support for %x", ver);
WARN_ON(true);
break;
}
return unit_id;
@@ -149,9 +160,14 @@ int nvgpu_pmu_initialize_perfmon(struct gk20a *g, struct nvgpu_pmu *pmu,
break;
#endif
default:
nvgpu_kfree(g, *perfmon_ptr);
err = -EINVAL;
nvgpu_err(g, "no support for GPUID %x", ver);
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
if (nvgpu_next_pmu_initialize_perfmon(g, pmu, perfmon_ptr))
#endif
{
nvgpu_kfree(g, *perfmon_ptr);
err = -ENODEV;
nvgpu_err(g, "no support for GPUID %x", ver);
}
break;
}