gpu: nvgpu: vgpu: add support for gv11b syncpoints

In t19x, gv11b semaphore read and write operations are
translated to host1x syncpoint read and write operations
using semaphore syncpoint shim aperture. Implement relevant
vgpu hal functions for this in fifo hal.

Jira EVLR-1571

Change-Id: I6296cc6e592ea991e1c01bc9662d02fb063ff3c7
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1516367
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Aparna Das
2017-08-04 17:32:02 -07:00
committed by mobile promotions
parent 86e1c3278f
commit df4e88a21d
5 changed files with 105 additions and 3 deletions

View File

@@ -16,6 +16,7 @@
#define TEGRA_VGPU_CMD_ALLOC_CTX_HEADER 100
#define TEGRA_VGPU_CMD_FREE_CTX_HEADER 101
#define TEGRA_VGPU_CMD_MAP_SYNCPT 102
struct tegra_vgpu_alloc_ctx_header_params {
u64 ch_handle;
@@ -26,9 +27,18 @@ struct tegra_vgpu_free_ctx_header_params {
u64 ch_handle;
};
struct tegra_vgpu_map_syncpt_params {
u64 as_handle;
u64 gpu_va;
u64 len;
u64 offset;
u8 prot;
};
union tegra_vgpu_t19x_params {
struct tegra_vgpu_alloc_ctx_header_params alloc_ctx_header;
struct tegra_vgpu_free_ctx_header_params free_ctx_header;
struct tegra_vgpu_map_syncpt_params map_syncpt;
};
#define TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT 100