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gpu: nvgpu: disable fecs trace support for safety builds
Compile all files with fecs trace support only if flag NVGPU_FECS_TRACE_SUPPORT is set remove CONFIG_GK20A_CTXSW_TRACE checks from within the files add POSIX file for fecs trace support for compilation with make command Jira NVGPU-3414 Change-Id: I205e3494ce94138ab6c6fccf7fbcefc41f953c77 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2120276 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -32,6 +32,7 @@ all:
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os/posix/posix-sim.c,
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os/posix/posix-sim.c,
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os/posix/posix-vgpu.c,
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os/posix/posix-vgpu.c,
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os/posix/posix-vidmem.c,
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os/posix/posix-vidmem.c,
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os/posix/fecs_trace_posix.c,
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os/posix/stubs.c ]
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os/posix/stubs.c ]
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headers:
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headers:
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@@ -60,7 +60,6 @@ nvgpu-y += \
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common/gr/subctx.o \
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common/gr/subctx.o \
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common/gr/zcull.o \
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common/gr/zcull.o \
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common/gr/gr_config.o \
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common/gr/gr_config.o \
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common/gr/fecs_trace.o \
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common/gr/zbc.o \
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common/gr/zbc.o \
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common/gr/gr_setup.o \
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common/gr/gr_setup.o \
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common/gr/hwpm_map.o \
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common/gr/hwpm_map.o \
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@@ -185,8 +184,6 @@ nvgpu-y += \
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hal/gr/ecc/ecc_gp10b.o \
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hal/gr/ecc/ecc_gp10b.o \
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hal/gr/ecc/ecc_gv11b.o \
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hal/gr/ecc/ecc_gv11b.o \
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hal/gr/ecc/ecc_tu104.o \
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hal/gr/ecc/ecc_tu104.o \
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hal/gr/fecs_trace/fecs_trace_gm20b.o \
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hal/gr/fecs_trace/fecs_trace_gv11b.o \
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hal/gr/zcull/zcull_gm20b.o \
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hal/gr/zcull/zcull_gm20b.o \
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hal/gr/zcull/zcull_gv11b.o \
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hal/gr/zcull/zcull_gv11b.o \
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hal/gr/ctxsw_prog/ctxsw_prog_gm20b.o \
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hal/gr/ctxsw_prog/ctxsw_prog_gm20b.o \
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@@ -429,6 +426,9 @@ nvgpu-$(CONFIG_DEBUG_FS) += \
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endif
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endif
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nvgpu-$(CONFIG_GK20A_CTXSW_TRACE) += \
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nvgpu-$(CONFIG_GK20A_CTXSW_TRACE) += \
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common/gr/fecs_trace.o \
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hal/gr/fecs_trace/fecs_trace_gm20b.o \
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hal/gr/fecs_trace/fecs_trace_gv11b.o \
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os/linux/fecs_trace_linux.o
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os/linux/fecs_trace_linux.o
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ifeq ($(CONFIG_GK20A_CTXSW_TRACE),y)
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ifeq ($(CONFIG_GK20A_CTXSW_TRACE),y)
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@@ -472,9 +472,13 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
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os/linux/vgpu/vgpu_ivc.o \
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os/linux/vgpu/vgpu_ivc.o \
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os/linux/vgpu/vgpu_ivm.o \
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os/linux/vgpu/vgpu_ivm.o \
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os/linux/vgpu/vgpu_linux.o \
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os/linux/vgpu/vgpu_linux.o \
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os/linux/vgpu/fecs_trace_vgpu_linux.o \
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os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.o
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os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.o
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ifeq ($(CONFIG_GK20A_CTXSW_TRACE),y)
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nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
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os/linux/vgpu/fecs_trace_vgpu_linux.o
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endif
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nvgpu-$(CONFIG_COMMON_CLK) += \
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nvgpu-$(CONFIG_COMMON_CLK) += \
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os/linux/clk.o
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os/linux/clk.o
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@@ -50,4 +50,6 @@ NVGPU_DGPU_SUPPORT := 1
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NVGPU_COMMON_CFLAGS += -DNVGPU_DGPU_SUPPORT
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NVGPU_COMMON_CFLAGS += -DNVGPU_DGPU_SUPPORT
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ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0)
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ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0)
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NVGPU_FECS_TRACE_SUPPORT := 1
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NVGPU_COMMON_CFLAGS += -DCONFIG_GK20A_CTXSW_TRACE
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endif
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endif
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@@ -43,7 +43,8 @@ srcs += os/posix/nvgpu.c \
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os/posix/posix-nvhost.c \
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os/posix/posix-nvhost.c \
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os/posix/posix-vgpu.c \
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os/posix/posix-vgpu.c \
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os/posix/posix-dt.c \
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os/posix/posix-dt.c \
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os/posix/posix-vidmem.c
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os/posix/posix-vidmem.c \
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os/posix/fecs_trace_posix.c
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endif
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endif
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# POSIX sources shared between the POSIX and QNX builds.
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# POSIX sources shared between the POSIX and QNX builds.
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@@ -116,7 +117,6 @@ srcs += common/sim/sim.c \
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common/gr/gr_falcon.c \
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common/gr/gr_falcon.c \
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common/gr/zcull.c \
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common/gr/zcull.c \
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common/gr/gr_config.c \
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common/gr/gr_config.c \
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common/gr/fecs_trace.c \
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common/gr/zbc.c \
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common/gr/zbc.c \
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common/gr/gr_setup.c \
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common/gr/gr_setup.c \
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common/gr/hwpm_map.c \
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common/gr/hwpm_map.c \
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@@ -278,8 +278,6 @@ srcs += common/sim/sim.c \
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hal/gr/ecc/ecc_gp10b.c \
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hal/gr/ecc/ecc_gp10b.c \
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hal/gr/ecc/ecc_gv11b.c \
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hal/gr/ecc/ecc_gv11b.c \
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hal/gr/ecc/ecc_tu104.c \
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hal/gr/ecc/ecc_tu104.c \
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hal/gr/fecs_trace/fecs_trace_gm20b.c \
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hal/gr/fecs_trace/fecs_trace_gv11b.c \
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hal/gr/zcull/zcull_gm20b.c \
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hal/gr/zcull/zcull_gm20b.c \
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hal/gr/zcull/zcull_gv11b.c \
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hal/gr/zcull/zcull_gv11b.c \
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hal/gr/ctxsw_prog/ctxsw_prog_gm20b.c \
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hal/gr/ctxsw_prog/ctxsw_prog_gm20b.c \
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@@ -456,6 +454,18 @@ ifeq ($(NVGPU_DEBUGGER),1)
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srcs += common/debugger.c
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srcs += common/debugger.c
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endif
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endif
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ifeq ($(NVGPU_FECS_TRACE_SUPPORT),1)
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srcs += common/gr/fecs_trace.c \
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hal/gr/fecs_trace/fecs_trace_gm20b.c \
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hal/gr/fecs_trace/fecs_trace_gv11b.c
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endif
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ifeq ($(NVGPU_FECS_TRACE_SUPPORT),1)
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ifeq ($(IGPU_VIRT_SUPPORT), 1)
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srcs += common/vgpu/gr/fecs_trace_vgpu.c
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endif
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endif
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# POSIX file used for unit testing for both qnx and linux
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# POSIX file used for unit testing for both qnx and linux
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ifdef NVGPU_FAULT_INJECTION_ENABLEMENT
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ifdef NVGPU_FAULT_INJECTION_ENABLEMENT
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srcs += os/posix/posix-fault-injection.c
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srcs += os/posix/posix-fault-injection.c
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@@ -484,7 +494,6 @@ srcs += common/vgpu/init/init_vgpu.c \
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common/vgpu/tsg_vgpu.c \
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common/vgpu/tsg_vgpu.c \
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common/vgpu/perf/cyclestats_snapshot_vgpu.c \
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common/vgpu/perf/cyclestats_snapshot_vgpu.c \
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common/vgpu/perf/perf_vgpu.c \
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common/vgpu/perf/perf_vgpu.c \
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common/vgpu/gr/fecs_trace_vgpu.c \
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common/vgpu/mm/mm_vgpu.c \
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common/vgpu/mm/mm_vgpu.c \
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common/vgpu/mm/vm_vgpu.c \
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common/vgpu/mm/vm_vgpu.c \
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common/vgpu/gr/gr_vgpu.c \
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common/vgpu/gr/gr_vgpu.c \
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@@ -34,8 +34,6 @@
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#include <nvgpu/gr/fecs_trace.h>
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#include <nvgpu/gr/fecs_trace.h>
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#include <nvgpu/gr/gr_utils.h>
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#include <nvgpu/gr/gr_utils.h>
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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static int nvgpu_gr_fecs_trace_periodic_polling(void *arg);
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static int nvgpu_gr_fecs_trace_periodic_polling(void *arg);
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int nvgpu_gr_fecs_trace_add_context(struct gk20a *g, u32 context_ptr,
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int nvgpu_gr_fecs_trace_add_context(struct gk20a *g, u32 context_ptr,
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@@ -707,5 +705,3 @@ int nvgpu_gr_fecs_trace_unbind_channel(struct gk20a *g,
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return 0;
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return 0;
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}
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}
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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@@ -30,8 +30,6 @@
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#include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
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#include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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int gm20b_fecs_trace_flush(struct gk20a *g)
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int gm20b_fecs_trace_flush(struct gk20a *g)
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{
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{
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int err;
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int err;
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@@ -70,5 +68,3 @@ u32 gm20b_fecs_trace_get_buffer_full_mailbox_val(void)
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{
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{
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return 0x26;
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return 0x26;
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}
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}
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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@@ -22,11 +22,7 @@
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#include "fecs_trace_gv11b.h"
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#include "fecs_trace_gv11b.h"
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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u32 gv11b_fecs_trace_get_buffer_full_mailbox_val(void)
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u32 gv11b_fecs_trace_get_buffer_full_mailbox_val(void)
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{
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{
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return 0x32;
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return 0x32;
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}
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}
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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@@ -547,7 +547,6 @@ int gk20a_ctxsw_dev_mmap(struct file *filp, struct vm_area_struct *vma)
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return ret;
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return ret;
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}
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}
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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static int gk20a_ctxsw_init_devs(struct gk20a *g)
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static int gk20a_ctxsw_init_devs(struct gk20a *g)
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{
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{
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struct gk20a_ctxsw_trace *trace = g->ctxsw_trace;
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struct gk20a_ctxsw_trace *trace = g->ctxsw_trace;
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@@ -568,11 +567,9 @@ static int gk20a_ctxsw_init_devs(struct gk20a *g)
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}
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}
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return 0;
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return 0;
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}
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}
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#endif
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int gk20a_ctxsw_trace_init(struct gk20a *g)
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int gk20a_ctxsw_trace_init(struct gk20a *g)
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{
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{
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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struct gk20a_ctxsw_trace *trace = g->ctxsw_trace;
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struct gk20a_ctxsw_trace *trace = g->ctxsw_trace;
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int err;
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int err;
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@@ -605,14 +602,10 @@ fail:
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nvgpu_kfree(g, trace);
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nvgpu_kfree(g, trace);
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g->ctxsw_trace = NULL;
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g->ctxsw_trace = NULL;
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return err;
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return err;
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#else
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return 0;
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#endif
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}
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}
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void gk20a_ctxsw_trace_cleanup(struct gk20a *g)
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void gk20a_ctxsw_trace_cleanup(struct gk20a *g)
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{
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{
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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struct gk20a_ctxsw_trace *trace;
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struct gk20a_ctxsw_trace *trace;
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struct gk20a_ctxsw_dev *dev;
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struct gk20a_ctxsw_dev *dev;
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int i;
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int i;
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@@ -632,7 +625,6 @@ void gk20a_ctxsw_trace_cleanup(struct gk20a *g)
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g->ctxsw_trace = NULL;
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g->ctxsw_trace = NULL;
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g->ops.gr.fecs_trace.deinit(g);
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g->ops.gr.fecs_trace.deinit(g);
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#endif
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}
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}
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int nvgpu_gr_fecs_trace_write_entry(struct gk20a *g,
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int nvgpu_gr_fecs_trace_write_entry(struct gk20a *g,
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@@ -744,7 +736,6 @@ void nvgpu_gr_fecs_trace_wake_up(struct gk20a *g, int vmid)
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void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
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void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
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{
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{
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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struct nvgpu_gpu_ctxsw_trace_entry entry = {
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struct nvgpu_gpu_ctxsw_trace_entry entry = {
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.vmid = 0,
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.vmid = 0,
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.tag = NVGPU_CTXSW_TAG_ENGINE_RESET,
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.tag = NVGPU_CTXSW_TAG_ENGINE_RESET,
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@@ -758,7 +749,7 @@ void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
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g->ops.ptimer.read_ptimer(g, &entry.timestamp);
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g->ops.ptimer.read_ptimer(g, &entry.timestamp);
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nvgpu_gr_fecs_trace_write_entry(g, &entry);
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nvgpu_gr_fecs_trace_write_entry(g, &entry);
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nvgpu_gr_fecs_trace_wake_up(g, 0);
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nvgpu_gr_fecs_trace_wake_up(g, 0);
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#endif
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trace_gk20a_channel_reset(~0, tsg->tsgid);
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trace_gk20a_channel_reset(~0, tsg->tsgid);
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}
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}
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72
drivers/gpu/nvgpu/os/posix/fecs_trace_posix.c
Normal file
72
drivers/gpu/nvgpu/os/posix/fecs_trace_posix.c
Normal file
@@ -0,0 +1,72 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/gr/fecs_trace.h>
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int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size);
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void vgpu_fecs_trace_data_update(struct gk20a *g);
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void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
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void **mmapaddr, size_t *mmapsize);
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int nvgpu_gr_fecs_trace_ring_alloc(struct gk20a *g,
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void **buf, size_t *size)
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{
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return -EINVAL;
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}
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int nvgpu_gr_fecs_trace_ring_free(struct gk20a *g)
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{
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return -EINVAL;
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}
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void nvgpu_gr_fecs_trace_get_mmap_buffer_info(struct gk20a *g,
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void **mmapaddr, size_t *mmapsize)
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{
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}
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int nvgpu_gr_fecs_trace_write_entry(struct gk20a *g,
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struct nvgpu_gpu_ctxsw_trace_entry *entry)
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{
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return -EINVAL;
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}
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void nvgpu_gr_fecs_trace_wake_up(struct gk20a *g, int vmid)
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{
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}
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|
||||||
|
void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
u8 nvgpu_gpu_ctxsw_tags_to_common_tags(u8 tags)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
|
||||||
|
{
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
void vgpu_fecs_trace_data_update(struct gk20a *g)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
|
||||||
|
void **mmapaddr, size_t *mmapsize)
|
||||||
|
{
|
||||||
|
}
|
||||||
Reference in New Issue
Block a user