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gpu: nvgpu: update SW quiesce
Update SW quiesce as follows: - After waking up sw_quiesce_thread, nvgpu_sw_quiesce masks interrupts, then disables and preempts runlists without lock. There could be still a concurrent thread that would re-enable the runlist by accident. This is very unlikely and would mean we are not in mission mode anyway. - In sw_quiesce_thread, wait NVGPU_SW_QUIESCE_TIMEOUT_MS, to leave some time for interrupt handler to set error notifier (in case of HW error interrupt). Then disable and preempt runlists, and set error notifier for remaining channels before exiting the process. Also modified nvgpu_can_busy to return false in case SW quiesce is pending. This will make subsequent devctl to fail. Jira NVGPU-4512 Change-Id: I36dd554485f3b9b08f740f352f737ac4baa28746 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266389 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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committed by
Alex Waterman
parent
fbafc9e05c
commit
e0a6000456
@@ -719,7 +719,6 @@ int test_quiesce(struct unit_module *m, struct gk20a *g, void *args)
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nvgpu_set_power_state(g, NVGPU_STATE_POWERED_ON);
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/* make sure we simulate interrupts enabled */
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g->mc.irqs_enabled = true;
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intr_masked = false;
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/* setup HAL for masking interrupts */
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@@ -740,10 +739,8 @@ int test_quiesce(struct unit_module *m, struct gk20a *g, void *args)
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/* wait for quiesce thread to complete */
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nvgpu_thread_join(&g->sw_quiesce_thread);
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if (g->mc.irqs_enabled || !intr_masked) {
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unit_err(m, "quiesce failed to disable interrupts\n");
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if (!intr_masked) {
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unit_err(m, "quiesce failed to mask interrupts\n");
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ret = UNIT_FAIL;
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}
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