gpu: nvgpu: Split pmu_perf.h into private and public

pmu_perf/pmu_perf.h is used both by pmu_perf itself, and other units
calling pmu_perf. Move all public dependencies to
include/nvgpu/pmu/perf.h

JIRA NVGPU-961

Change-Id: I7966abd8225487820f3a7f5bd16b6995e8bf59c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1986073
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/include/nvgpu/pmu/perf.h

@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef NVGPU_PMU_PERF_H
+#define NVGPU_PMU_PERF_H
+
+#include <nvgpu/types.h>
+#include <nvgpu/cond.h>
+#include <nvgpu/thread.h>
+#include <nvgpu/pmu/pstate.h>
+#include <nvgpu/pmu/volt.h>
+#include <nvgpu/pmu/lpwr.h>
+#include <nvgpu/boardobjgrp_e32.h>
+#include <nvgpu/boardobjgrp_e255.h>
+#include <nvgpu/boardobjgrpmask.h>
+#include <nvgpu/pmuif/gpmuifperf.h>
+
+struct gk20a;
+
+struct nvgpu_vfe_invalidate {
+	bool state_change;
+	struct nvgpu_cond wq;
+	struct nvgpu_thread state_task;
+};
+
+struct vfe_vars {
+	struct boardobjgrp_e32 super;
+	u8 polling_periodms;
+};
+
+struct vfe_equs {
+	struct boardobjgrp_e255 super;
+};
+
+struct change_seq_pmu_script {
+	struct perf_change_seq_pmu_script buf;
+	u32 super_surface_offset;
+};
+
+struct change_seq {
+	u8 version;
+	bool b_enabled_pmu_support;
+	u32 thread_seq_id_last;
+	u64 thread_carry_over_timens;
+	struct ctrl_perf_change_seq_change last_pstate_values;
+	struct boardobjgrpmask_e32 clk_domains_exclusion_mask;
+	struct boardobjgrpmask_e32 clk_domains_inclusion_mask;
+	u32 client_lock_mask;
+};
+
+struct change_seq_pmu {
+	struct change_seq super;
+	bool b_lock;
+	bool b_vf_point_check_ignore;
+	u32 cpu_adverised_step_id_mask;
+	u32 cpu_step_id_mask;
+	u32 event_mask_pending;
+	u32 event_mask_received;
+	u32 last_completed_change_Seq_id;
+	struct change_seq_pmu_script script_curr;
+	struct change_seq_pmu_script script_last;
+	struct change_seq_pmu_script script_query;
+};
+
+struct perf_pmupstate {
+	struct vfe_vars vfe_varobjs;
+	struct vfe_equs vfe_equobjs;
+	struct pstates pstatesobjs;
+	struct obj_volt volt;
+	struct obj_lwpr lpwr;
+	struct nvgpu_vfe_invalidate vfe_init;
+	struct change_seq_pmu changeseq_pmu;
+};
+
+int perf_pmu_vfe_load(struct gk20a *g);
+int perf_pmu_init_pmupstate(struct gk20a *g);
+void perf_pmu_free_pmupstate(struct gk20a *g);
+
+int vfe_equ_sw_setup(struct gk20a *g);
+int vfe_equ_pmu_setup(struct gk20a *g);
+
+int vfe_var_sw_setup(struct gk20a *g);
+int vfe_var_pmu_setup(struct gk20a *g);
+
+int nvgpu_perf_change_seq_sw_setup(struct gk20a *g);
+int nvgpu_perf_change_seq_pmu_setup(struct gk20a *g);
+
+#endif /* NVGPU_PMU_PERF_H */

drivers/gpu/nvgpu/lpwr/lpwr.c

@@ -26,9 +26,9 @@
 #include <nvgpu/gk20a.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmu/pstate.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "gp106/bios_gp106.h"
-#include "pmu_perf/pmu_perf.h"
 #include "lpwr.h"
 
 static int get_lpwr_idx_table(struct gk20a *g)

drivers/gpu/nvgpu/pmu_perf/change_seq.c

@@ -28,6 +28,7 @@
 #include <nvgpu/pmuif/ctrlclk.h>
 #include <nvgpu/pmu/pstate.h>
 #include <nvgpu/pmu/clk.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "pmu_perf.h"
 

drivers/gpu/nvgpu/pmu_perf/change_seq.h

@@ -25,39 +25,4 @@
 #ifndef NVGPU_CHANGE_SEQ_H
 #define NVGPU_CHANGE_SEQ_H
 
-#include <nvgpu/boardobjgrpmask.h>
-
-struct change_seq_pmu_script {
-	struct perf_change_seq_pmu_script buf;
-	u32 super_surface_offset;
-};
-
-struct change_seq {
-	u8 version;
-	bool b_enabled_pmu_support;
-	u32 thread_seq_id_last;
-	u64 thread_carry_over_timens;
-	struct ctrl_perf_change_seq_change last_pstate_values;
-	struct boardobjgrpmask_e32 clk_domains_exclusion_mask;
-	struct boardobjgrpmask_e32 clk_domains_inclusion_mask;
-	u32 client_lock_mask;
-};
-
-struct change_seq_pmu {
-	struct change_seq super;
-	bool b_lock;
-	bool b_vf_point_check_ignore;
-	u32 cpu_adverised_step_id_mask;
-	u32 cpu_step_id_mask;
-	u32 event_mask_pending;
-	u32 event_mask_received;
-	u32 last_completed_change_Seq_id;
-	struct change_seq_pmu_script script_curr;
-	struct change_seq_pmu_script script_last;
-	struct change_seq_pmu_script script_query;
-};
-
-int nvgpu_perf_change_seq_sw_setup(struct gk20a *g);
-int nvgpu_perf_change_seq_pmu_setup(struct gk20a *g);
-
 #endif /* NVGPU_CHANGE_SEQ_H */

drivers/gpu/nvgpu/pmu_perf/perf_gv100.c

@@ -26,6 +26,7 @@
 #include <nvgpu/bug.h>
 #include <nvgpu/gk20a.h>
 #include <nvgpu/pmu/clk.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "perf_gv100.h"
 #include "pmu_perf.h"

drivers/gpu/nvgpu/pmu_perf/perf_tu104.c

@@ -26,6 +26,8 @@
 #include <nvgpu/bug.h>
 #include <nvgpu/gk20a.h>
 #include <nvgpu/clk_arb.h>
+#include <nvgpu/pmu/perf.h>
+
 #include "perf_tu104.h"
 #include "pmu_perf/pmu_perf.h"
 

drivers/gpu/nvgpu/pmu_perf/pmu_perf.c

@@ -24,6 +24,7 @@
 #include <nvgpu/pmu.h>
 #include <nvgpu/clk_arb.h>
 #include <nvgpu/gk20a.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "pmu_perf.h"
 

drivers/gpu/nvgpu/pmu_perf/pmu_perf.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -19,17 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef NVGPU_PERF_H
+#ifndef NVGPU_PMU_PERF_PERF_H
-#define NVGPU_PERF_H
+#define NVGPU_PMU_PERF_PERF_H
-
-#include <nvgpu/pmu/pstate.h>
-#include <nvgpu/pmu/volt.h>
-#include <nvgpu/pmu/lpwr.h>
-#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
-
-#include "vfe_equ.h"
-#include "vfe_var.h"
-#include "change_seq.h"
 
 #define CTRL_PERF_VFE_VAR_TYPE_INVALID                               0x00U
 #define CTRL_PERF_VFE_VAR_TYPE_DERIVED                               0x01U
@@ -72,26 +63,4 @@
 #define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER_EQ                0x01U
 #define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER                   0x02U
 
-struct gk20a;
+#endif /* NVGPU_PMU_PERF_PERF_H */
-
-struct nvgpu_vfe_invalidate {
-	bool state_change;
-	struct nvgpu_cond wq;
-	struct nvgpu_thread state_task;
-};
-
-struct perf_pmupstate {
-	struct vfe_vars vfe_varobjs;
-	struct vfe_equs vfe_equobjs;
-	struct pstates pstatesobjs;
-	struct obj_volt volt;
-	struct obj_lwpr lpwr;
-	struct nvgpu_vfe_invalidate vfe_init;
-	struct change_seq_pmu changeseq_pmu;
-};
-
-int perf_pmu_init_pmupstate(struct gk20a *g);
-void perf_pmu_free_pmupstate(struct gk20a *g);
-int perf_pmu_vfe_load(struct gk20a *g);
-
-#endif /* NVGPU_PERF_H */

drivers/gpu/nvgpu/pmu_perf/vfe_equ.c

@@ -27,6 +27,7 @@
 #include <nvgpu/string.h>
 #include <nvgpu/pmuif/ctrlclk.h>
 #include <nvgpu/pmuif/ctrlvolt.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "pmu_perf.h"
 #include "vfe_equ.h"

drivers/gpu/nvgpu/pmu_perf/vfe_equ.h

@@ -28,9 +28,6 @@
 #include "vfe_var.h"
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 
-int vfe_equ_sw_setup(struct gk20a *g);
-int vfe_equ_pmu_setup(struct gk20a *g);
-
 #define VFE_EQU_GET(_pperf, _idx)                                              \
 	((struct vfe_equ *)BOARDOBJGRP_OBJ_GET_BY_IDX(                         \
 		&((_pperf)->vfe.equs.super.super), (_idx)))
@@ -57,10 +54,6 @@ struct vfe_equ {
 	bool b_is_dynamic;
 };
 
-struct vfe_equs {
-	struct boardobjgrp_e255 super;
-};
-
 struct vfe_equ_compare {
 	struct vfe_equ super;
 	u8 func_id;

drivers/gpu/nvgpu/pmu_perf/vfe_var.c

@@ -28,6 +28,7 @@
 #include <nvgpu/pmuif/ctrlclk.h>
 #include <nvgpu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmuif/ctrlperf.h>
+#include <nvgpu/pmu/perf.h>
 
 #include "pmu_perf.h"
 #include "vfe_var.h"

drivers/gpu/nvgpu/pmu_perf/vfe_var.h

@@ -28,9 +28,6 @@
 #include <nvgpu/boardobjgrp_e255.h>
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 
-int vfe_var_sw_setup(struct gk20a *g);
-int vfe_var_pmu_setup(struct gk20a *g);
-
 #define VFE_VAR_GET(_pperf, _idx)                                              \
 	((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX(                           \
 	&((_pperf)->vfe.vars.super.super), (_idx)))
@@ -48,11 +45,6 @@ struct vfe_var {
 	bool b_is_dynamic;
 };
 
-struct vfe_vars {
-	struct boardobjgrp_e32 super;
-	u8 polling_periodms;
-};
-
 struct vfe_var_derived {
 	struct vfe_var super;
 };

drivers/gpu/nvgpu/pstate/pstate.c

@@ -28,9 +28,7 @@
 #include <nvgpu/pmu/clk.h>
 #include <nvgpu/pmu/pmgr.h>
 #include <nvgpu/pmu/therm.h>
-
+#include <nvgpu/pmu/perf.h>
-#include "pmu_perf/pmu_perf.h"
-#include "pmu_perf/change_seq.h"
 
 #include "pstate.h"
 

drivers/gpu/nvgpu/volt/volt_dev.c

@@ -30,8 +30,8 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmuif/ctrlvolt.h>
+#include <nvgpu/pmu/perf.h>
 
-#include "pmu_perf/pmu_perf.h"
 #include "gp106/bios_gp106.h"
 
 #include "volt.h"

drivers/gpu/nvgpu/volt/volt_pmu.c

@@ -28,8 +28,8 @@
 #include <nvgpu/pmuif/ctrlvolt.h>
 #include <nvgpu/pmuif/ctrlperf.h>
 #include <nvgpu/string.h>
+#include <nvgpu/pmu/perf.h>
 
-#include "pmu_perf/pmu_perf.h"
 #include "gp106/bios_gp106.h"
 
 #include "volt.h"

drivers/gpu/nvgpu/volt/volt_policy.c

@@ -26,8 +26,8 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmuif/ctrlvolt.h>
+#include <nvgpu/pmu/perf.h>
 
-#include "pmu_perf/pmu_perf.h"
 #include "gp106/bios_gp106.h"
 
 #include "volt.h"

drivers/gpu/nvgpu/volt/volt_rail.c

@@ -26,8 +26,8 @@
 #include <nvgpu/boardobjgrp_e32.h>
 #include <nvgpu/string.h>
 #include <nvgpu/pmuif/ctrlvolt.h>
+#include <nvgpu/pmu/perf.h>
 
-#include "pmu_perf/pmu_perf.h"
 #include "gp106/bios_gp106.h"
 
 #include "volt.h"