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gpu: nvgpu: gv11b: null check for fault_ch

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gk20a_gr_get_channel_from_ctx() could return NULL as a result
fault_ch could be null

JIRA GPUT19X-7

Change-Id: If89507d3d3fa5a95ba75c4a90eb212d0c8b2214a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1323255
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Seema Khowala
2017-03-17 11:32:41 -07:00
committed by mobile promotions
parent 40d2f60903
commit e1cad55e52
1 changed files with 5 additions and 2 deletions
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7
drivers/gpu/nvgpu/gv11b/gr_gv11b.c
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@@ -1413,8 +1413,7 @@ static int gr_gv11b_pre_process_sm_exception(struct gk20a *g,
bool *early_exit, bool *ignore_debugger)
{
int ret;
bool cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode ==
NVGPU_COMPUTE_PREEMPTION_MODE_CILP) ;
bool cilp_enabled = false;
u32 global_mask = 0, dbgr_control0, global_esr_copy;
u32 offset = proj_gpc_stride_v() * gpc +
proj_tpc_in_gpc_stride_v() * tpc;
@@ -1422,6 +1421,10 @@ static int gr_gv11b_pre_process_sm_exception(struct gk20a *g,
*early_exit = false;
*ignore_debugger = false;
if (fault_ch)
cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode ==
NVGPU_COMPUTE_PREEMPTION_MODE_CILP);
gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u\n",
gpc, tpc, global_esr);