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gpu: nvgpu: unit: add tests for gm20b engine HAL

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Add unit test for the following HAL:
- gm20b_read_engine_status_info

Jira NVGPU-3695

Change-Id: I8752e3ac83fb647704ad5547d650574d2b5a95c7
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253505
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-11-21 11:15:14 -05:00
committed by Alex Waterman
parent 94056dedf5
commit e211535142
10 changed files with 407 additions and 5 deletions
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32
userspace/units/fifo/engine/gm20b/Makefile Normal file
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine-gm20b.o
MODULE = nvgpu-engine-gm20b
LIB_PATHS += -lnvgpu-fifo
include ../../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ../..

35
userspace/units/fifo/engine/gm20b/Makefile.interface.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine-gm20b
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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userspace/units/fifo/engine/gm20b/Makefile.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine-gm20b
NVGPU_UNIT_SRCS = nvgpu-engine-gm20b.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \
$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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userspace/units/fifo/engine/gm20b/nvgpu-engine-gm20b.c Normal file
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/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/io.h>
#include <nvgpu/top.h>
#include <nvgpu/engines.h>
#include <nvgpu/engine_status.h>
#include "hal/fifo/engine_status_gm20b.h"
#include <nvgpu/hw/gm20b/hw_fifo_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include "../../nvgpu-fifo.h"
#include "nvgpu-engine-gm20b.h"
#ifdef ENGINE_GM20B_UNIT_DEBUG
#undef unit_verbose
#define unit_verbose unit_info
#else
#define unit_verbose(unit, msg, ...) \
do { \
if (0) { \
unit_info(unit, msg, ##__VA_ARGS__); \
} \
} while (0)
#endif
#define assert(cond) unit_assert(cond, goto done)
#define branches_str test_fifo_flags_str
#define pruned test_fifo_subtest_pruned
#define F_ENGINE_READ_STATUS_BUSY BIT(0)
#define F_ENGINE_READ_STATUS_FAULTED BIT(1)
#define F_ENGINE_READ_STATUS_ID_TSG BIT(2)
#define F_ENGINE_READ_STATUS_ID_NEXT_TSG BIT(3)
#define F_ENGINE_READ_STATUS_LAST BIT(4)
#define NUM_STATES 5
int test_gm20b_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args)
{
int ret = UNIT_FAIL;
struct nvgpu_engine_status_info expected;
struct nvgpu_engine_status_info status;
struct nvgpu_fifo *f = &g->fifo;
u32 engine_id = 0;
u32 ctx_id, ctx_id_type;
u32 ctx_next_id, ctx_next_id_type;
u32 branches = 0;
u32 data;
u32 ctxsw_status;
const char *labels[] = {
"busy",
"faulted",
"id_tsg",
"id_next_tsg",
"ctx_valid",
"ctx_load",
"ctx_save",
"ctx_switch",
};
char *ctxsw_status_label = NULL;
assert(f->num_engines > 0);
assert(f->engine_info[0].engine_enum == NVGPU_ENGINE_GR);
nvgpu_writel(g, fifo_engine_status_r(engine_id), 0xbeef);
gm20b_read_engine_status_info(g, NVGPU_INVALID_ENG_ID, &status);
assert(status.reg_data == 0);
for (branches = 0; branches < F_ENGINE_READ_STATUS_LAST; branches++) {
memset(&expected, 0, sizeof(expected));
memset(&status, 0, sizeof(status));
data = 0U;
if (branches & F_ENGINE_READ_STATUS_ID_TSG) {
ctx_id = 1;
ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_TSGID;
data |= (fifo_engine_status_id_type_tsgid_v() << 12);
} else {
ctx_id = 101;
ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_CHID;
data |= (fifo_engine_status_id_type_chid_v() << 12);
}
data |= (ctx_id << 0);
if (branches & F_ENGINE_READ_STATUS_ID_NEXT_TSG) {
ctx_next_id = 2;
ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID;
data |= (fifo_engine_status_next_id_type_tsgid_v() << 28);
} else {
ctx_next_id = 102;
ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_CHID;
data |= (fifo_engine_status_next_id_type_chid_v() << 28);
}
data |= (ctx_next_id << 16);
if (branches & F_ENGINE_READ_STATUS_BUSY) {
data |= BIT(31);
expected.is_busy = true;
}
if (branches & F_ENGINE_READ_STATUS_FAULTED) {
data |= BIT(30);
expected.is_faulted = true;
}
for (ctxsw_status = NVGPU_CTX_STATUS_INVALID;
ctxsw_status <= NVGPU_CTX_STATUS_CTXSW_SWITCH;
ctxsw_status++) {
expected.ctx_id = ENGINE_STATUS_CTX_ID_INVALID;
expected.ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_INVALID;
expected.ctx_next_id = ENGINE_STATUS_CTX_NEXT_ID_INVALID;
expected.ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_INVALID;
data = data & ~(0x7 << 13);
switch (ctxsw_status) {
case NVGPU_CTX_STATUS_VALID:
data |= (fifo_engine_status_ctx_status_valid_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_VALID;
ctxsw_status_label = "valid";
break;
case NVGPU_CTX_STATUS_CTXSW_LOAD:
data |= (fifo_engine_status_ctx_status_ctxsw_load_v() << 13);
expected.ctx_next_id = ctx_next_id;
expected.ctx_next_id_type = ctx_next_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_LOAD;
ctxsw_status_label = "load";
break;
case NVGPU_CTX_STATUS_CTXSW_SAVE:
data |= (fifo_engine_status_ctx_status_ctxsw_save_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_SAVE;
ctxsw_status_label = "save";
break;
case NVGPU_CTX_STATUS_CTXSW_SWITCH:
data |= (fifo_engine_status_ctx_status_ctxsw_switch_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctx_next_id = ctx_next_id;
expected.ctx_next_id_type = ctx_next_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_SWITCH;
ctxsw_status_label = "switch";
break;
default:
case NVGPU_CTX_STATUS_INVALID:
expected.ctxsw_status = NVGPU_CTX_STATUS_INVALID;
ctxsw_status_label = "invalid";
break;
}
if (data & fifo_engine_status_ctxsw_in_progress_f()) {
expected.ctxsw_in_progress = true;
}
unit_verbose(m, "%s branches=%s %s\n", __func__,
branches_str(branches, labels), ctxsw_status_label);
nvgpu_writel(g, fifo_engine_status_r(engine_id), data);
gm20b_read_engine_status_info(g, engine_id, &status);
assert(status.is_busy == expected.is_busy);
assert(status.is_faulted == expected.is_faulted);
assert(status.ctxsw_in_progress == expected.ctxsw_in_progress);
assert(status.ctxsw_status == expected.ctxsw_status);
assert(status.ctx_id == expected.ctx_id);
assert(status.ctx_id_type == expected.ctx_id_type);
assert(status.ctx_next_id == expected.ctx_next_id);
assert(status.ctx_next_id_type == expected.ctx_next_id_type);
}
}
ret = UNIT_SUCCESS;
done:
if (ret != UNIT_SUCCESS) {
unit_err(m, "%s branches=%s\n", __func__,
branches_str(branches, labels));
}
return ret;
}
struct unit_module_test nvgpu_engine_gm20b_tests[] = {
UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
UNIT_TEST(read_engine_status_info, test_gm20b_read_engine_status_info, NULL, 0),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
};
UNIT_MODULE(nvgpu_engine_gm20b, nvgpu_engine_gm20b_tests, UNIT_PRIO_NVGPU_TEST);

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userspace/units/fifo/engine/gm20b/nvgpu-engine-gm20b.h Normal file
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/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_GM20B_H
#define UNIT_NVGPU_ENGINE_GM20B_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine-gm20b
* @{
*
* Software Unit Test Specification for fifo/engine/gm20b
*/
/**
* Test specification for: test_gm20b_read_engine_status_info
*
* Description: Branch coverage for gm20b_read_engine_status_info
*
* Test Type: Feature based
*
* Input: test_fifo_init_support has run.
*
* Steps:
* - Set fifo_engine_status_r with combinations of H/W status:
* - engine is busy/idle
* - engine faulted/non-faulted
* - ctxsw status (valid, invalid, load, save, switch)
* - Check that nvgpu_engine_status_info is consistent with H/W status.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gm20b_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_GM20B_H */