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gpu: nvgpu: nvgpu_memcpy changes to linux os code

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MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs
to qualified/unqualified types.

To circumvent this issue we've introduced a new MISRA-compliant
nvgpu_memcpy() function.

While linux os code does not need to be MISRA-compliant this
change switches over all memcpy() uses to nvgpu_memcpy()
with appropriate casts applied to maintain consistency within
the nvgpu source base.

JIRA NVGPU-849

Change-Id: I2c21a7845df5709dafa19508c121f8afa27cc4fc
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950995
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-11-14 15:25:49 -08:00
committed by mobile promotions
parent df92b05e43
commit e24df49765
7 changed files with 28 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/os/linux/ctxsw_trace.c
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@@ -27,6 +27,7 @@
#include <nvgpu/barrier.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/string.h>
#include "gk20a/gr_gk20a.h"
#include "gk20a/fecs_trace_gk20a.h"
@@ -252,14 +253,14 @@ static int gk20a_ctxsw_dev_ioctl_ring_setup(struct gk20a_ctxsw_dev *dev,
static void nvgpu_set_ctxsw_trace_filter_args(struct nvgpu_gpu_ctxsw_trace_filter *filter_dst,
struct nvgpu_ctxsw_trace_filter *filter_src)
{
(void) memcpy(filter_dst->tag_bits, filter_src->tag_bits,
nvgpu_memcpy((u8 *)filter_dst->tag_bits, (u8 *)filter_src->tag_bits,
(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
}
static void nvgpu_get_ctxsw_trace_filter_args(struct nvgpu_ctxsw_trace_filter *filter_dst,
struct nvgpu_gpu_ctxsw_trace_filter *filter_src)
{
(void) memcpy(filter_dst->tag_bits, filter_src->tag_bits,
nvgpu_memcpy((u8 *)filter_dst->tag_bits, (u8 *)filter_src->tag_bits,
(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
}