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gpu: nvgpu: nvgpu_memcpy changes to linux os code
MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs to qualified/unqualified types. To circumvent this issue we've introduced a new MISRA-compliant nvgpu_memcpy() function. While linux os code does not need to be MISRA-compliant this change switches over all memcpy() uses to nvgpu_memcpy() with appropriate casts applied to maintain consistency within the nvgpu source base. JIRA NVGPU-849 Change-Id: I2c21a7845df5709dafa19508c121f8afa27cc4fc Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1950995 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -35,6 +35,7 @@
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#include <nvgpu/channel.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/linux/vm.h>
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@@ -290,7 +291,8 @@ static int gk20a_init_cde_buf(struct gk20a_cde_ctx *cde_ctx,
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/* copy the content */
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/* copy the content */
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if (buf->data_byte_offset != 0)
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if (buf->data_byte_offset != 0)
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(void) memcpy(mem->cpu_va, img->data + buf->data_byte_offset,
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nvgpu_memcpy((u8 *)mem->cpu_va,
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(u8 *)(img->data + buf->data_byte_offset),
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buf->num_bytes);
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buf->num_bytes);
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cde_ctx->num_bufs++;
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cde_ctx->num_bufs++;
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@@ -644,9 +646,10 @@ static int gk20a_cde_pack_cmdbufs(struct gk20a_cde_ctx *cde_ctx)
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}
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}
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/* move the original init here and append convert */
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/* move the original init here and append convert */
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(void) memcpy(combined_cmd, cde_ctx->init_convert_cmd, init_bytes);
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nvgpu_memcpy((u8 *)combined_cmd,
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(void) memcpy(combined_cmd + cde_ctx->init_cmd_num_entries,
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(u8 *)cde_ctx->init_convert_cmd, init_bytes);
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cde_ctx->convert_cmd, conv_bytes);
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nvgpu_memcpy((u8 *)(combined_cmd + cde_ctx->init_cmd_num_entries),
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(u8 *)cde_ctx->convert_cmd, conv_bytes);
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nvgpu_kfree(g, cde_ctx->init_convert_cmd);
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nvgpu_kfree(g, cde_ctx->init_convert_cmd);
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nvgpu_kfree(g, cde_ctx->convert_cmd);
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nvgpu_kfree(g, cde_ctx->convert_cmd);
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@@ -714,8 +717,8 @@ static int gk20a_init_cde_img(struct gk20a_cde_ctx *cde_ctx,
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break;
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break;
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}
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}
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case TYPE_ARRAY:
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case TYPE_ARRAY:
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(void) memcpy(&cde_app->arrays[elem->array.id][0],
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nvgpu_memcpy((u8 *)&cde_app->arrays[elem->array.id][0],
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elem->array.data,
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(u8 *)elem->array.data,
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MAX_CDE_ARRAY_ENTRIES*sizeof(u32));
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MAX_CDE_ARRAY_ENTRIES*sizeof(u32));
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break;
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break;
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default:
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default:
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@@ -27,6 +27,7 @@
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#include <nvgpu/barrier.h>
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#include <nvgpu/barrier.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/string.h>
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#include "gk20a/gr_gk20a.h"
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#include "gk20a/gr_gk20a.h"
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#include "gk20a/fecs_trace_gk20a.h"
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#include "gk20a/fecs_trace_gk20a.h"
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@@ -252,14 +253,14 @@ static int gk20a_ctxsw_dev_ioctl_ring_setup(struct gk20a_ctxsw_dev *dev,
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static void nvgpu_set_ctxsw_trace_filter_args(struct nvgpu_gpu_ctxsw_trace_filter *filter_dst,
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static void nvgpu_set_ctxsw_trace_filter_args(struct nvgpu_gpu_ctxsw_trace_filter *filter_dst,
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struct nvgpu_ctxsw_trace_filter *filter_src)
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struct nvgpu_ctxsw_trace_filter *filter_src)
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{
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{
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(void) memcpy(filter_dst->tag_bits, filter_src->tag_bits,
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nvgpu_memcpy((u8 *)filter_dst->tag_bits, (u8 *)filter_src->tag_bits,
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(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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}
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}
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static void nvgpu_get_ctxsw_trace_filter_args(struct nvgpu_ctxsw_trace_filter *filter_dst,
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static void nvgpu_get_ctxsw_trace_filter_args(struct nvgpu_ctxsw_trace_filter *filter_dst,
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struct nvgpu_gpu_ctxsw_trace_filter *filter_src)
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struct nvgpu_gpu_ctxsw_trace_filter *filter_src)
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{
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{
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(void) memcpy(filter_dst->tag_bits, filter_src->tag_bits,
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nvgpu_memcpy((u8 *)filter_dst->tag_bits, (u8 *)filter_src->tag_bits,
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(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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(NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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}
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}
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@@ -20,6 +20,7 @@
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#include <nvgpu/bug.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/firmware.h>
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#include <nvgpu/firmware.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include "platform_gk20a.h"
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#include "platform_gk20a.h"
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#include "os_linux.h"
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#include "os_linux.h"
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@@ -93,7 +94,7 @@ struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g,
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if (!fw->data)
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if (!fw->data)
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goto err_release;
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goto err_release;
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(void) memcpy(fw->data, linux_fw->data, linux_fw->size);
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nvgpu_memcpy((u8 *)fw->data, (u8 *)linux_fw->data, linux_fw->size);
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fw->size = linux_fw->size;
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fw->size = linux_fw->size;
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release_firmware(linux_fw);
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release_firmware(linux_fw);
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@@ -24,6 +24,7 @@
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#include <nvgpu/kmem.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/vidmem.h>
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#include <nvgpu/vidmem.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include <nvgpu/linux/dma.h>
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#include <nvgpu/linux/dma.h>
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@@ -202,7 +203,8 @@ int __nvgpu_mem_create_from_pages(struct gk20a *g, struct nvgpu_mem *dest,
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if (!our_pages)
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if (!our_pages)
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return -ENOMEM;
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return -ENOMEM;
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(void) memcpy(our_pages, pages, sizeof(struct page *) * nr_pages);
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nvgpu_memcpy((u8 *)our_pages, (u8 *)pages,
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sizeof(struct page *) * nr_pages);
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if (nvgpu_get_sgtable_from_pages(g, &sgt, pages, 0,
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if (nvgpu_get_sgtable_from_pages(g, &sgt, pages, 0,
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nr_pages * PAGE_SIZE)) {
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nr_pages * PAGE_SIZE)) {
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@@ -28,6 +28,7 @@
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#include <nvgpu/soc.h>
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#include <nvgpu/soc.h>
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#include <nvgpu/sim.h>
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#include <nvgpu/sim.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include "nvlink.h"
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#include "nvlink.h"
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#include "clk/clk.h"
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#include "clk/clk.h"
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@@ -701,8 +702,8 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
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}
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}
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/* copy detected device data to allocated platform space*/
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/* copy detected device data to allocated platform space*/
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(void) memcpy((void *)platform,
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nvgpu_memcpy((u8 *)platform,
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(void *)&nvgpu_pci_device[pent->driver_data],
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(u8 *)&nvgpu_pci_device[pent->driver_data],
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sizeof(struct gk20a_platform));
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sizeof(struct gk20a_platform));
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pci_set_drvdata(pdev, platform);
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pci_set_drvdata(pdev, platform);
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@@ -24,6 +24,7 @@
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#include <nvgpu/bug.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/barrier.h>
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#include <nvgpu/barrier.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include "gk20a/gr_gk20a.h"
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#include "gk20a/gr_gk20a.h"
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#include "sched.h"
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#include "sched.h"
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@@ -418,7 +419,8 @@ int gk20a_sched_dev_open(struct inode *inode, struct file *filp)
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goto free_ref;
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goto free_ref;
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}
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}
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(void) memcpy(sched->recent_tsg_bitmap, sched->active_tsg_bitmap,
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nvgpu_memcpy((u8 *)sched->recent_tsg_bitmap,
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(u8 *)sched->active_tsg_bitmap,
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sched->bitmap_size);
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sched->bitmap_size);
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(void) memset(sched->ref_tsg_bitmap, 0, sched->bitmap_size);
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(void) memset(sched->ref_tsg_bitmap, 0, sched->bitmap_size);
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@@ -21,6 +21,7 @@
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#include <nvgpu/kmem.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/nvhost.h>
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#include <nvgpu/nvhost.h>
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#include <nvgpu/ptimer.h>
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#include <nvgpu/ptimer.h>
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#include <nvgpu/string.h>
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#include "os_linux.h"
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#include "os_linux.h"
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#include "sysfs.h"
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#include "sysfs.h"
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@@ -655,7 +656,8 @@ static ssize_t aelpg_param_store(struct device *dev,
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/* If parameter value is 0 then reset to SW default values*/
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/* If parameter value is 0 then reset to SW default values*/
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if ((paramlist[0] | paramlist[1] | paramlist[2]
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if ((paramlist[0] | paramlist[1] | paramlist[2]
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| paramlist[3] | paramlist[4]) == 0x00) {
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| paramlist[3] | paramlist[4]) == 0x00) {
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(void) memcpy(paramlist, defaultparam, sizeof(defaultparam));
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nvgpu_memcpy((u8 *)paramlist, (u8 *)defaultparam,
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sizeof(defaultparam));
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}
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}
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/* If aelpg is enabled & pmu is ready then post values to
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/* If aelpg is enabled & pmu is ready then post values to
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