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gpu: nvgpu: Unify ivm mempool

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CBC contig allocation requires mempool node in DT and the
node can be used for contig allocations. The code duplication
can be avoided by unifying the code from vgpu.

Change-Id: I6eaa1d0c9db47b158602bf0ba68ce4e09cf487a7
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2650459
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Dinesh T
2022-01-06 08:34:22 +00:00
committed by mobile promotions
parent 40397ac0c4
commit e33bdceb8b
11 changed files with 60 additions and 55 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
arch/nvgpu-common.yaml
View File

@@ -1,4 +1,4 @@
# Copyright (c) 2019-2021, NVIDIA CORPORATION. All Rights Reserved.
# Copyright (c) 2019-2022, NVIDIA CORPORATION. All Rights Reserved.
#
# Common elements and units in nvgpu.
#
@@ -126,7 +126,8 @@ cbc:
owner: Seshendra G
sources: [ common/cbc/cbc.c,
include/nvgpu/cbc.h,
include/nvgpu/gops/cbc.h ]
include/nvgpu/gops/cbc.h,
include/nvgpu/nvgpu_ivm.h ]
regops:
safe: no

6
arch/nvgpu-linux.yaml
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2019-2021, NVIDIA CORPORATION. All Rights Reserved.
# Copyright (c) 2019-2022 NVIDIA CORPORATION. All Rights Reserved.
#
# Linux elements and units in nvgpu.
#
@@ -228,13 +228,13 @@ vgpu:
os/linux/vgpu/platform_vgpu_tegra.h,
os/linux/vgpu/sysfs_vgpu.c,
os/linux/vgpu/vgpu_ivc.c,
os/linux/vgpu/vgpu_ivm.c,
os/linux/vgpu/vgpu_linux.c,
os/linux/vgpu/vgpu_linux.h ]
vm:
sources: [ os/linux/vm.c,
os/linux/vm_remap.c ]
os/linux/vm_remap.c,
os/linux/nvgpu_ivm.c ]
cic:
sources: [ os/linux/cic/cic_stub.c ]

3
arch/nvgpu-vgpu.yaml
View File

@@ -1,4 +1,4 @@
# Copyright (c) 2019-2021, NVIDIA CORPORATION. All Rights Reserved.
# Copyright (c) 2019-2022, NVIDIA CORPORATION. All Rights Reserved.
#
# vGPU architecture: currently there hasn't been much work done on
# decomposing the vGPU architecture so all of the vGPU files are simply
@@ -74,7 +74,6 @@ all:
include/nvgpu/vgpu/tegra_vgpu.h,
include/nvgpu/vgpu/vgpu.h,
include/nvgpu/vgpu/vgpu_ivc.h,
include/nvgpu/vgpu/vgpu_ivm.h,
include/nvgpu/vgpu/ce_vgpu.h,
include/nvgpu/vgpu/vm_vgpu.h,
include/nvgpu/vgpu/os_init_hal_vgpu.h ]

3
drivers/gpu/nvgpu/Makefile
View File

@@ -474,6 +474,8 @@ nvgpu-y += \
os/linux/dmabuf_priv.o \
os/linux/power_ops.o
nvgpu-$(CONFIG_NVGPU_IVM_BUILD) += os/linux/nvgpu_ivm.o
nvgpu-$(CONFIG_NVGPU_VPR) += os/linux/vpr.o
nvgpu-$(CONFIG_DEBUG_FS) += \
@@ -560,7 +562,6 @@ nvgpu-$(CONFIG_NVGPU_GR_VIRTUALIZATION) += \
os/linux/vgpu/platform_vgpu_tegra.o \
os/linux/vgpu/sysfs_vgpu.o \
os/linux/vgpu/vgpu_ivc.o \
os/linux/vgpu/vgpu_ivm.o \
os/linux/vgpu/vgpu_linux.o \
os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.o

4
drivers/gpu/nvgpu/Makefile.linux.configs
View File

@@ -102,6 +102,10 @@ ifneq ($(findstring 5.10,$(NV_BUILD_KERNEL_OPTIONS)),)
CONFIG_NVGPU_NVMAP_NEXT := y
endif
ifeq ($(findstring stable,$(NV_BUILD_KERNEL_OPTIONS)),)
CONFIG_NVGPU_IVM_BUILD := y
endif
# Enable support for GPUs on PCIe bus.
ifeq ($(CONFIG_PCI),y)
# Support for NVGPU DGPU

16
drivers/gpu/nvgpu/common/vgpu/gr/fecs_trace_vgpu.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -25,7 +25,7 @@
#include <nvgpu/enabled.h>
#include <nvgpu/gr/fecs_trace.h>
#include <nvgpu/dt.h>
#include <nvgpu/vgpu/vgpu_ivm.h>
#include <nvgpu/nvgpu_ivm.h>
#include <nvgpu/vgpu/tegra_vgpu.h>
#include <nvgpu/vgpu/vgpu.h>
#include <nvgpu/gk20a.h>
@@ -59,7 +59,7 @@ int vgpu_fecs_trace_init(struct gk20a *g)
goto fail;
}
vcst->cookie = vgpu_ivm_mempool_reserve(mempool);
vcst->cookie = nvgpu_ivm_mempool_reserve(mempool);
if ((vcst->cookie == NULL) ||
((unsigned long)vcst->cookie >= (unsigned long)-MAX_ERRNO)) {
nvgpu_info(g,
@@ -69,7 +69,7 @@ int vgpu_fecs_trace_init(struct gk20a *g)
goto fail;
}
vcst->buf = vgpu_ivm_mempool_map(vcst->cookie);
vcst->buf = nvgpu_ivm_mempool_map(vcst->cookie);
if (!vcst->buf) {
nvgpu_info(g, "ioremap_cache failed");
err = -EINVAL;
@@ -88,10 +88,10 @@ int vgpu_fecs_trace_init(struct gk20a *g)
return 0;
fail:
if (vcst->cookie != NULL && vcst->buf != NULL) {
vgpu_ivm_mempool_unmap(vcst->cookie, vcst->buf);
nvgpu_ivm_mempool_unmap(vcst->cookie, vcst->buf);
}
if (vcst->cookie) {
vgpu_ivm_mempool_unreserve(vcst->cookie);
nvgpu_ivm_mempool_unreserve(vcst->cookie);
}
nvgpu_kfree(g, vcst);
return err;
@@ -101,8 +101,8 @@ int vgpu_fecs_trace_deinit(struct gk20a *g)
{
struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
vgpu_ivm_mempool_unmap(vcst->cookie, vcst->buf);
vgpu_ivm_mempool_unreserve(vcst->cookie);
nvgpu_ivm_mempool_unmap(vcst->cookie, vcst->buf);
nvgpu_ivm_mempool_unreserve(vcst->cookie);
nvgpu_kfree(g, vcst);
return 0;
}

16
drivers/gpu/nvgpu/common/vgpu/perf/cyclestats_snapshot_vgpu.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/vgpu/vgpu_ivm.h>
#include <nvgpu/nvgpu_ivm.h>
#include <nvgpu/vgpu/vgpu.h>
#include <nvgpu/vgpu/tegra_vgpu.h>
#include <nvgpu/dt.h>
@@ -45,7 +45,7 @@ int vgpu_css_init(struct gk20a *g)
return err;
}
cookie = vgpu_ivm_mempool_reserve(mempool);
cookie = nvgpu_ivm_mempool_reserve(mempool);
if ((cookie == NULL) ||
((unsigned long)cookie >= (unsigned long)-MAX_ERRNO)) {
nvgpu_err(g, "mempool %u reserve failed", mempool);
@@ -67,7 +67,7 @@ u32 vgpu_css_get_buffer_size(struct gk20a *g)
return 0U;
}
return vgpu_ivm_get_size(priv->css_cookie);
return nvgpu_ivm_get_size(priv->css_cookie);
}
static int vgpu_css_init_snapshot_buffer(struct gk20a *g)
@@ -88,7 +88,7 @@ static int vgpu_css_init_snapshot_buffer(struct gk20a *g)
return -EINVAL;
}
size = vgpu_ivm_get_size(priv->css_cookie);
size = nvgpu_ivm_get_size(priv->css_cookie);
/* Make sure buffer size is large enough */
if (size < CSS_MIN_HW_SNAPSHOT_SIZE) {
nvgpu_info(g, "mempool size 0x%llx too small", size);
@@ -96,9 +96,9 @@ static int vgpu_css_init_snapshot_buffer(struct gk20a *g)
goto fail;
}
buf = vgpu_ivm_mempool_map(priv->css_cookie);
buf = nvgpu_ivm_mempool_map(priv->css_cookie);
if (!buf) {
nvgpu_info(g, "vgpu_ivm_mempool_map failed");
nvgpu_info(g, "nvgpu_ivm_mempool_map failed");
err = -EINVAL;
goto fail;
}
@@ -122,7 +122,7 @@ void vgpu_css_release_snapshot_buffer(struct gk20a *g)
return;
}
vgpu_ivm_mempool_unmap(priv->css_cookie, data->hw_snapshot);
nvgpu_ivm_mempool_unmap(priv->css_cookie, data->hw_snapshot);
data->hw_snapshot = NULL;
nvgpu_log_info(g, "cyclestats(vgpu): buffer for snapshots released\n");

18
drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivm.h → drivers/gpu/nvgpu/include/nvgpu/nvgpu_ivm.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -20,18 +20,18 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_VGPU_IVM_H
#define NVGPU_VGPU_IVM_H
#ifndef NVGPU_IVM_H
#define NVGPU_IVM_H
#include <nvgpu/types.h>
struct tegra_hv_ivm_cookie;
struct tegra_hv_ivm_cookie *vgpu_ivm_mempool_reserve(unsigned int id);
int vgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie);
u64 vgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie);
u64 vgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie);
void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie);
void vgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
struct tegra_hv_ivm_cookie *nvgpu_ivm_mempool_reserve(unsigned int id);
int nvgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie);
u64 nvgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie);
u64 nvgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie);
void *nvgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie);
void nvgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void *addr);
#endif /* NVGPU_VGPU_IVM_H */

20
drivers/gpu/nvgpu/os/linux/vgpu/vgpu_ivm.c → drivers/gpu/nvgpu/os/linux/nvgpu_ivm.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2022, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -14,39 +14,39 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <nvgpu/vgpu/vgpu_ivm.h>
#include <nvgpu/nvgpu_ivm.h>
#include <linux/tegra-ivc.h>
#include "os/linux/os_linux.h"
struct tegra_hv_ivm_cookie *vgpu_ivm_mempool_reserve(unsigned int id)
struct tegra_hv_ivm_cookie *nvgpu_ivm_mempool_reserve(unsigned int id)
{
return tegra_hv_mempool_reserve(id);
}
int vgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
int nvgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
{
return tegra_hv_mempool_unreserve(cookie);
}
u64 vgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
u64 nvgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
{
return cookie->ipa;
}
u64 vgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
u64 nvgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
{
return cookie->size;
}
void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
void *nvgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
{
return ioremap_cache(vgpu_ivm_get_ipa(cookie),
vgpu_ivm_get_size(cookie));
return ioremap_cache(nvgpu_ivm_get_ipa(cookie),
nvgpu_ivm_get_size(cookie));
}
void vgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void nvgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void *addr)
{
iounmap(addr);

10
drivers/gpu/nvgpu/os/linux/vgpu/fecs_trace_vgpu_linux.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -15,7 +15,7 @@
*/
#include <nvgpu/vgpu/tegra_vgpu.h>
#include <nvgpu/vgpu/vgpu_ivm.h>
#include <nvgpu/nvgpu_ivm.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/gr/fecs_trace.h>
@@ -33,7 +33,7 @@ int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
*buf = vcst->buf;
*size = vgpu_ivm_get_size(vcst->cookie);
*size = nvgpu_ivm_get_size(vcst->cookie);
return 0;
}
@@ -42,6 +42,6 @@ void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
{
struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
*mmapsize = vgpu_ivm_get_size(vcst->cookie);
*mmapaddr = (void *) (vgpu_ivm_get_ipa(vcst->cookie) >> PAGE_SHIFT);
*mmapsize = nvgpu_ivm_get_size(vcst->cookie);
*mmapaddr = (void *) (nvgpu_ivm_get_ipa(vcst->cookie) >> PAGE_SHIFT);
}

14
drivers/gpu/nvgpu/os/posix/posix-vgpu.c
View File

@@ -24,7 +24,7 @@
#include <nvgpu/bug.h>
#include <nvgpu/vgpu/vgpu.h>
#include <nvgpu/vgpu/vgpu_ivc.h>
#include <nvgpu/vgpu/vgpu_ivm.h>
#include <nvgpu/nvgpu_ivm.h>
#include <nvgpu/vgpu/os_init_hal_vgpu.h>
struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
@@ -123,42 +123,42 @@ void vgpu_ivc_oob_put_ptr(void *handle)
}
struct tegra_hv_ivm_cookie *vgpu_ivm_mempool_reserve(unsigned int id)
struct tegra_hv_ivm_cookie *nvgpu_ivm_mempool_reserve(unsigned int id)
{
(void)id;
BUG();
return NULL;
}
int vgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
int nvgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0;
}
u64 vgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
u64 nvgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0ULL;
}
u64 vgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
u64 nvgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0ULL;
}
void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
void *nvgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return NULL;
}
void vgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void nvgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void *addr)
{
(void)cookie;