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gpu: nvgpu: add clock gating support for HSHUB

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Add BLCG and SLCG clock gating support for HSHUB unit on gv11b and tu104

Register list for BLCG and SLCG is auto generated with scripts.
Add HAL operations to enable/disable HSHUB clock gating

Re-generate gv11b reglist so that all the manually commented registers
are automatically deleted. Some of the unicast registers are also
deleted. We already have corresponding broadcast registers present.

Bug 2526212

Change-Id: I2654f158daa802bcf992e103ed4a44675aa5fd4d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2150199
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-07-09 15:12:32 +05:30
committed by mobile promotions
parent 4249359aa9
commit e34b6f76d3
8 changed files with 126 additions and 19 deletions
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4
drivers/gpu/nvgpu/hal/init/hal_tu104.c
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@@ -823,6 +823,8 @@ static const struct gpu_ops tu104_ops = {
tu104_slcg_therm_load_gating_prod,
.slcg_xbar_load_gating_prod =
tu104_slcg_xbar_load_gating_prod,
.slcg_hshub_load_gating_prod =
tu104_slcg_hshub_load_gating_prod,
.blcg_bus_load_gating_prod =
tu104_blcg_bus_load_gating_prod,
.blcg_ce_load_gating_prod =
@@ -843,6 +845,8 @@ static const struct gpu_ops tu104_ops = {
tu104_blcg_pmu_load_gating_prod,
.blcg_xbar_load_gating_prod =
tu104_blcg_xbar_load_gating_prod,
.blcg_hshub_load_gating_prod =
tu104_blcg_hshub_load_gating_prod,
},
.fifo = {
.init_fifo_setup_hw = tu104_init_fifo_setup_hw,