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gpu: nvgpu: gp106: Fix MISRA 15.6 violations

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MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces, introducing the braces.

JIRA NVGPU-671

Change-Id: I8493274995ed8de526902dd0ca0808b2972e28aa
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796806
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Srirangan
2018-08-27 11:29:01 +05:30
committed by mobile promotions
parent 2f97e683fe
commit e3710e5431
12 changed files with 161 additions and 88 deletions
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9
drivers/gpu/nvgpu/gp106/hal_gp106.c
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@@ -224,8 +224,9 @@ static int gp106_init_gpu_characteristics(struct gk20a *g)
int err;
err = gk20a_init_gpu_characteristics(g);
if (err)
if (err) {
return err;
}
__nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_VOLTAGE, true);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_GET_CURRENT, true);
@@ -868,8 +869,10 @@ int gp106_init_hal(struct gk20a *g)
__nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false);
/* Read fuses to check if gpu needs to boot in secure/non-secure mode */
if (gops->fuse.check_priv_security(g))
return -EINVAL; /* Do not boot gpu */
if (gops->fuse.check_priv_security(g)) {
/* Do not boot gpu */
return -EINVAL;
}
g->pmu_lsf_pmu_wpr_init_done = 0;
g->bootstrap_owner = LSF_FALCON_ID_SEC2;