gpu: nvgpu: Add MC APIs for reset masks

Add API for querying reset mask corresponding to a unit. The reset
masks need to be read from MC HW header, and we do not want all
units to access Mc HW headers themselves.

JIRA NVGPU-954

Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1823384
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-09-12 14:51:40 -07:00
committed by mobile promotions
parent 78e3d22da3
commit e3ae03e17a
28 changed files with 136 additions and 35 deletions

View File

@@ -31,6 +31,7 @@
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/channel.h>
#include <nvgpu/unit.h>
#include "gk20a.h"
#include "gr_gk20a.h"
@@ -39,14 +40,13 @@
#include <nvgpu/hw/gk20a/hw_gr_gk20a.h>
#include <nvgpu/hw/gk20a/hw_perf_gk20a.h>
#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
static void gk20a_perfbuf_reset_streaming(struct gk20a *g)
{
u32 engine_status;
u32 num_unread_bytes;
g->ops.mc.reset(g, mc_enable_perfmon_enabled_f());
g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON));
engine_status = gk20a_readl(g, perf_pmasys_enginestatus_r());
WARN_ON(0u ==