From e3e813840452a92a53a05a6cdd840f9bffd0f15c Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 2 Apr 2019 18:45:50 +0530 Subject: [PATCH] gpu: nvgpu: move global ctx commit hal to common.gr.obj_ctx unit gr_gk20a_commit_global_ctx_buffers() is h/w independent, hence move it to common unit common.gr.obj_ctx and rename it as nvgpu_gr_obj_ctx_commit_global_ctx_buffers() Delete g->ops.gr.commit_global_ctx_buffers hal Jira NVGPU-1887 Change-Id: If1c840237b8ba2c13bed40a4315810073756aeb9 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/2088506 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/obj_ctx.c | 64 ++++++++++++++++++- .../nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c | 1 - .../nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c | 1 - drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 56 ---------------- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 2 - drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 1 - drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 1 - drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 - drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 - drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 2 - drivers/gpu/nvgpu/include/nvgpu/gr/obj_ctx.h | 3 + drivers/gpu/nvgpu/tu104/hal_tu104.c | 1 - 12 files changed, 65 insertions(+), 69 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/obj_ctx.c b/drivers/gpu/nvgpu/common/gr/obj_ctx.c index d89330f05..df04527f2 100644 --- a/drivers/gpu/nvgpu/common/gr/obj_ctx.c +++ b/drivers/gpu/nvgpu/common/gr/obj_ctx.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include "obj_ctx_priv.h" @@ -43,6 +44,62 @@ #include #include +int nvgpu_gr_obj_ctx_commit_global_ctx_buffers(struct gk20a *g, + struct nvgpu_gr_ctx *gr_ctx, bool patch) +{ + struct gr_gk20a *gr = &g->gr; + u64 addr; + u32 size; + + nvgpu_log_fn(g, " "); + + if (patch) { + int err; + err = nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, false); + if (err != 0) { + return err; + } + } + + /* global pagepool buffer */ + addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, NVGPU_GR_CTX_PAGEPOOL_VA); + size = (u32)nvgpu_gr_global_ctx_get_size(gr->global_ctx_buffer, + NVGPU_GR_GLOBAL_CTX_PAGEPOOL); + + g->ops.gr.init.commit_global_pagepool(g, gr_ctx, addr, size, patch, + true); + + /* global bundle cb */ + addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, NVGPU_GR_CTX_CIRCULAR_VA); + size = g->ops.gr.init.get_bundle_cb_default_size(g); + + g->ops.gr.init.commit_global_bundle_cb(g, gr_ctx, addr, size, patch); + + /* global attrib cb */ + addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, + NVGPU_GR_CTX_ATTRIBUTE_VA); + + g->ops.gr.init.commit_global_attrib_cb(g, gr_ctx, + nvgpu_gr_config_get_tpc_count(g->gr.config), + nvgpu_gr_config_get_max_tpc_count(g->gr.config), addr, patch); + + g->ops.gr.init.commit_global_cb_manager(g, g->gr.config, gr_ctx, patch); + + if (g->ops.gr.init.commit_rtv_cb != NULL) { + /* RTV circular buffer */ + addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, + NVGPU_GR_CTX_RTV_CIRCULAR_BUFFER_VA); + + g->ops.gr.init.commit_rtv_cb(g, addr, gr_ctx, patch); + } + + if (patch) { + nvgpu_gr_ctx_patch_write_end(g, gr_ctx, false); + } + + return 0; +} + static int nvgpu_gr_obj_ctx_alloc_sw_bundle(struct gk20a *g) { struct netlist_av_list *sw_bundle_init = @@ -219,7 +276,7 @@ int nvgpu_gr_obj_ctx_alloc_golden_ctx_image(struct gk20a *g, /* disable fe_go_idle */ g->ops.gr.init.fe_go_idle_timeout(g, false); - err = g->ops.gr.commit_global_ctx_buffers(g, gr_ctx, false); + err = nvgpu_gr_obj_ctx_commit_global_ctx_buffers(g, gr_ctx, false); if (err != 0) { goto clean_up; } @@ -361,7 +418,10 @@ int nvgpu_gr_obj_ctx_alloc(struct gk20a *g, goto out; } - g->ops.gr.commit_global_ctx_buffers(g, gr_ctx, true); + err = nvgpu_gr_obj_ctx_commit_global_ctx_buffers(g, gr_ctx, true); + if (err != 0) { + goto out; + } /* commit gr ctx buffer */ err = g->ops.gr.commit_inst(c, gr_ctx->mem.gpu_va); diff --git a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c index f3a2088ea..c3ac25729 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c @@ -196,7 +196,6 @@ static const struct gpu_ops vgpu_gp10b_ops = { .create_priv_addr_table = gr_gk20a_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gk20a_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, .set_debug_mode = gm20b_gr_set_debug_mode, diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c index 2ae08acf6..42cf21108 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c @@ -231,7 +231,6 @@ static const struct gpu_ops vgpu_gv11b_ops = { .create_priv_addr_table = gr_gv11b_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gk20a_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 4632069bf..177a417f9 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -200,62 +200,6 @@ u32 fecs_current_ctx_data(struct gk20a *g, struct nvgpu_mem *inst_block) gr_fecs_current_ctx_valid_f(1); } -int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, - struct nvgpu_gr_ctx *gr_ctx, bool patch) -{ - struct gr_gk20a *gr = &g->gr; - u64 addr; - u32 size; - - nvgpu_log_fn(g, " "); - - if (patch) { - int err; - err = nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, false); - if (err != 0) { - return err; - } - } - - /* global pagepool buffer */ - addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, NVGPU_GR_CTX_PAGEPOOL_VA); - size = (u32)nvgpu_gr_global_ctx_get_size(gr->global_ctx_buffer, - NVGPU_GR_GLOBAL_CTX_PAGEPOOL); - - g->ops.gr.init.commit_global_pagepool(g, gr_ctx, addr, size, patch, - true); - - /* global bundle cb */ - addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, NVGPU_GR_CTX_CIRCULAR_VA); - size = g->ops.gr.init.get_bundle_cb_default_size(g); - - g->ops.gr.init.commit_global_bundle_cb(g, gr_ctx, addr, size, patch); - - /* global attrib cb */ - addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, - NVGPU_GR_CTX_ATTRIBUTE_VA); - - g->ops.gr.init.commit_global_attrib_cb(g, gr_ctx, - nvgpu_gr_config_get_tpc_count(g->gr.config), - nvgpu_gr_config_get_max_tpc_count(g->gr.config), addr, patch); - - g->ops.gr.init.commit_global_cb_manager(g, g->gr.config, gr_ctx, patch); - - if (g->ops.gr.init.commit_rtv_cb != NULL) { - /* RTV circular buffer */ - addr = nvgpu_gr_ctx_get_global_ctx_va(gr_ctx, - NVGPU_GR_CTX_RTV_CIRCULAR_BUFFER_VA); - - g->ops.gr.init.commit_rtv_cb(g, addr, gr_ctx, patch); - } - - if (patch) { - nvgpu_gr_ctx_patch_write_end(g, gr_ctx, false); - } - - return 0; -} - int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g, struct channel_gk20a *c, bool enable_smpc_ctxsw) diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 0309fba36..0d416c1cc 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -423,8 +423,6 @@ int gk20a_gr_handle_notify_pending(struct gk20a *g, struct gr_gk20a_isr_data *isr_data); int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g); -int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, - struct nvgpu_gr_ctx *gr_ctx, bool patch); u32 fecs_current_ctx_data(struct gk20a *g, struct nvgpu_mem *inst_block); diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index c030c205a..3cb15e862 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -315,7 +315,6 @@ static const struct gpu_ops gm20b_ops = { .create_priv_addr_table = gr_gk20a_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gk20a_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, .set_debug_mode = gm20b_gr_set_debug_mode, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 3c904802b..593694096 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -352,7 +352,6 @@ static const struct gpu_ops gp10b_ops = { .create_priv_addr_table = gr_gk20a_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gk20a_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, .set_debug_mode = gm20b_gr_set_debug_mode, diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 622132cdb..21e0e7931 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -473,7 +473,6 @@ static const struct gpu_ops gv100_ops = { .create_priv_addr_table = gr_gv11b_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gv100_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 97110b98a..477c20834 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -432,7 +432,6 @@ static const struct gpu_ops gv11b_ops = { .create_priv_addr_table = gr_gv11b_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gk20a_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, .get_offset_in_gpccs_segment = gr_gk20a_get_offset_in_gpccs_segment, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index aa1a5e053..697ec2f2c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -444,8 +444,6 @@ struct gpu_ops { u32 *priv_addr_table, u32 *priv_addr_table_index); int (*alloc_global_ctx_buffers)(struct gk20a *g); - int (*commit_global_ctx_buffers)(struct gk20a *g, - struct nvgpu_gr_ctx *gr_ctx, bool patch); u32 (*get_nonpes_aware_tpc)(struct gk20a *g, u32 gpc, u32 tpc); int (*get_offset_in_gpccs_segment)(struct gk20a *g, enum ctxsw_addr_type addr_type, u32 num_tpcs, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/obj_ctx.h b/drivers/gpu/nvgpu/include/nvgpu/gr/obj_ctx.h index 86f555456..499a4c4b2 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gr/obj_ctx.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gr/obj_ctx.h @@ -35,6 +35,9 @@ struct nvgpu_mem; struct channel_gk20a; struct nvgpu_gr_obj_ctx_golden_image; +int nvgpu_gr_obj_ctx_commit_global_ctx_buffers(struct gk20a *g, + struct nvgpu_gr_ctx *gr_ctx, bool patch); + int nvgpu_gr_obj_ctx_alloc_golden_ctx_image(struct gk20a *g, struct nvgpu_gr_obj_ctx_golden_image *golden_image, struct nvgpu_gr_ctx *gr_ctx, diff --git a/drivers/gpu/nvgpu/tu104/hal_tu104.c b/drivers/gpu/nvgpu/tu104/hal_tu104.c index fadb73d9b..33e8461cb 100644 --- a/drivers/gpu/nvgpu/tu104/hal_tu104.c +++ b/drivers/gpu/nvgpu/tu104/hal_tu104.c @@ -501,7 +501,6 @@ static const struct gpu_ops tu104_ops = { .create_priv_addr_table = gr_gv11b_create_priv_addr_table, .split_fbpa_broadcast_addr = gr_gv100_split_fbpa_broadcast_addr, .alloc_global_ctx_buffers = gr_gk20a_alloc_global_ctx_buffers, - .commit_global_ctx_buffers = gr_gk20a_commit_global_ctx_buffers, .get_nonpes_aware_tpc = gr_gv11b_get_nonpes_aware_tpc, .get_offset_in_gpccs_segment = gr_tu104_get_offset_in_gpccs_segment,