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gpu: nvgpu: Move interrupt ISR code to common
This is one of the steps in restructuring of interrupt code. - Move ISR logic to common code. This will allow us to add mixed ASIL error handling levels. - Modify nonstall ISR to use threaded interrupts. Bottom half of nonstall ISR will run nonstall operations instead of adding work to workqueues. - Remove nonstall workqueue implementation. JIRA NVGPU-6351 Change-Id: I5f891b0de4b0c34f6ac05522a5da08dc36221aa6 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467713 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -23,6 +23,7 @@
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#include <nvgpu/nvhost.h>
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#include <nvgpu/nvgpu_common.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/mc.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/nvlink_probe.h>
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#include <nvgpu/soc.h>
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@@ -34,7 +35,6 @@
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#include "nvlink.h"
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#include "module.h"
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#include "intr.h"
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#include "sysfs.h"
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#include "os_linux.h"
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#include "platform_gk20a.h"
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@@ -323,11 +323,8 @@ static struct pci_device_id nvgpu_pci_table[] = {
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static irqreturn_t nvgpu_pci_isr(int irq, void *dev_id)
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{
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struct gk20a *g = dev_id;
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irqreturn_t ret_stall;
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irqreturn_t ret_nonstall;
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ret_stall = nvgpu_intr_stall(g);
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ret_nonstall = nvgpu_intr_nonstall(g);
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u32 ret_stall = nvgpu_intr_stall_isr(g);
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u32 ret_nonstall = nvgpu_intr_nonstall_isr(g);
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#if defined(CONFIG_PCI_MSI)
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/* Send MSI EOI */
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@@ -335,14 +332,22 @@ static irqreturn_t nvgpu_pci_isr(int irq, void *dev_id)
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g->ops.xve.rearm_msi(g);
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#endif
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return (ret_stall == IRQ_NONE) ? ret_nonstall : IRQ_WAKE_THREAD;
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if ((ret_stall == NVGPU_INTR_HANDLE) ||
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(ret_nonstall == NVGPU_INTR_HANDLE)) {
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return IRQ_WAKE_THREAD;
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}
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return IRQ_NONE;
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}
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static irqreturn_t nvgpu_pci_intr_thread(int irq, void *dev_id)
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{
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struct gk20a *g = dev_id;
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return nvgpu_intr_thread_stall(g);
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nvgpu_intr_stall_handle(g);
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nvgpu_intr_nonstall_handle(g);
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return IRQ_HANDLED;
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}
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static int nvgpu_pci_init_support(struct pci_dev *pdev)
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