diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c index 8d051e5a2..59d382775 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -526,6 +526,13 @@ static int nvgpu_pg_init_task(void *arg) nvgpu_pmu_dbg(g, "loaded zbc"); pmu_setup_hw_enable_elpg(g); nvgpu_pmu_dbg(g, "PMU booted, thread exiting"); + + gk20a_gr_wait_initialized(g); + + nvgpu_cg_blcg_enable_no_wait(g); + + nvgpu_cg_elcg_enable_no_wait(g); + return 0; default: nvgpu_pmu_dbg(g, "invalid state"); diff --git a/drivers/gpu/nvgpu/common/power_features/cg/cg.c b/drivers/gpu/nvgpu/common/power_features/cg/cg.c index 39796bc89..a966c4c6c 100644 --- a/drivers/gpu/nvgpu/common/power_features/cg/cg.c +++ b/drivers/gpu/nvgpu/common/power_features/cg/cg.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -84,6 +84,34 @@ void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g) nvgpu_mutex_release(&g->cg_pg_lock); } +void nvgpu_cg_blcg_disable_no_wait(struct gk20a *g) { + nvgpu_log_fn(g, " "); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + return; + } + + nvgpu_mutex_acquire(&g->cg_pg_lock); + if (g->blcg_enabled) { + nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_RUN); + } + nvgpu_mutex_release(&g->cg_pg_lock); +} + +void nvgpu_cg_blcg_enable_no_wait(struct gk20a *g) { + nvgpu_log_fn(g, " "); + + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) { + return; + } + + nvgpu_mutex_acquire(&g->cg_pg_lock); + if (g->blcg_enabled) { + nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_AUTO); + } + nvgpu_mutex_release(&g->cg_pg_lock); +} + void nvgpu_cg_elcg_enable(struct gk20a *g) { nvgpu_log_fn(g, " "); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 223937c64..4f897b970 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -1,7 +1,7 @@ /* * GK20A Graphics * - * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -4692,6 +4692,9 @@ static int gk20a_init_gr_prepare(struct gk20a *g) /* Disable elcg until it gets enabled later in the init*/ nvgpu_cg_elcg_disable_no_wait(g); + /* Disable blcg until it gets enabled later in the init*/ + nvgpu_cg_blcg_disable_no_wait(g); + /* enable fifo access */ gk20a_writel(g, gr_gpfifo_ctl_r(), gr_gpfifo_ctl_access_enabled_f() | @@ -5012,7 +5015,6 @@ int gk20a_init_gr_support(struct gk20a *g) } } - nvgpu_cg_elcg_enable_no_wait(g); /* GR is inialized, signal possible waiters */ g->gr.initialized = true; nvgpu_cond_signal(&g->gr.init_wq); @@ -5159,6 +5161,7 @@ int gk20a_gr_reset(struct gk20a *g) nvgpu_cg_init_gr_load_gating_prod(g); nvgpu_cg_elcg_enable_no_wait(g); + nvgpu_cg_blcg_enable_no_wait(g); /* GR is inialized, signal possible waiters */ g->gr.initialized = true; diff --git a/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h b/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h index 7b5fe265e..e23951760 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -35,6 +35,8 @@ void nvgpu_cg_elcg_disable(struct gk20a *g); void nvgpu_cg_elcg_enable_no_wait(struct gk20a *g); void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g); void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable); +void nvgpu_cg_blcg_disable_no_wait(struct gk20a *g); +void nvgpu_cg_blcg_enable_no_wait(struct gk20a *g); void nvgpu_cg_blcg_mode_enable(struct gk20a *g); void nvgpu_cg_blcg_mode_disable(struct gk20a *g);