From e46c1d2e1013cc8f505e4b7965d79200283b613e Mon Sep 17 00:00:00 2001 From: Ramalingam C Date: Wed, 3 May 2023 18:46:38 +0000 Subject: [PATCH] gpu: nvgpu: func to set a value at hw semaphore addr Add a function to set a value to the hw_sema addr offset. This will be used by the semaphore based gpfifo tracking. JIRA NVGPU-9588 Change-Id: I719196907b86723d22c0cda49b0612f0810ec9ef Signed-off-by: Ramalingam C Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2898140 Reviewed-by: Martin Radev Reviewed-by: Vijayakumar Subbu Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/semaphore/semaphore_hw.c | 10 +++++++++- drivers/gpu/nvgpu/include/nvgpu/semaphore.h | 3 ++- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/common/semaphore/semaphore_hw.c b/drivers/gpu/nvgpu/common/semaphore/semaphore_hw.c index 23eeb3adb..43e88266e 100644 --- a/drivers/gpu/nvgpu/common/semaphore/semaphore_hw.c +++ b/drivers/gpu/nvgpu/common/semaphore/semaphore_hw.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -151,6 +151,14 @@ bool nvgpu_hw_semaphore_reset(struct nvgpu_hw_semaphore *hw_sema) return true; } +void nvgpu_hw_semaphore_set(struct nvgpu_hw_semaphore *hw_sema, u32 val) +{ + struct nvgpu_semaphore_pool *pool = hw_sema->location.pool; + struct gk20a *g = pool->sema_sea->gk20a; + + nvgpu_mem_wr(g, &pool->rw_mem, hw_sema->location.offset, val); +} + int nvgpu_hw_semaphore_read_next(struct nvgpu_hw_semaphore *hw_sema) { return nvgpu_atomic_read(&hw_sema->next_value); diff --git a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h index a23ba0e8a..05c5353b5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h +++ b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -76,6 +76,7 @@ void nvgpu_hw_semaphore_free(struct nvgpu_hw_semaphore *hw_sema); u64 nvgpu_hw_semaphore_addr(struct nvgpu_hw_semaphore *hw_sema); u32 nvgpu_hw_semaphore_read(struct nvgpu_hw_semaphore *hw_sema); bool nvgpu_hw_semaphore_reset(struct nvgpu_hw_semaphore *hw_sema); +void nvgpu_hw_semaphore_set(struct nvgpu_hw_semaphore *hw_sema, u32 val); int nvgpu_hw_semaphore_read_next(struct nvgpu_hw_semaphore *hw_sema); int nvgpu_hw_semaphore_update_next(struct nvgpu_hw_semaphore *hw_sema);