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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
gpu: nvgpu: nvs: plug nvs with safety code
- Change enables CONFIG_NVS_PRESENT for safety build. - Fixes misra vioations. - Renames sched.h to nvs_sched.h to avoid the conflict with QNX system sched.h file for the safety support. - Disable test_channel_close, test_tsg_unbind_channel, test_channel_enable_disable_tsg, test_gv11b_fifo_preempt_tsg, test_tsg_unbind_channel_check_hw_state and test_rc_deinit unit tests. Jira NVGPU-8619 Change-Id: I7c983de2f4910fcb23687ec23368a060ce89c918 Signed-off-by: prsethi <prsethi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2763579 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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prsethi
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@@ -449,7 +449,7 @@ test_pmu_reset.pmu_reset=0
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[nvgpu-rc]
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test_rc_ctxsw_timeout.rc_ctxsw_timeout=0
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test_rc_deinit.rc_deinit=0
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test_rc_deinit.rc_deinit=2
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test_rc_fifo_recover.rc_fifo_recover=0
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test_rc_gr_fault.rc_gr_fault=0
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test_rc_init.rc_init=0
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@@ -477,12 +477,12 @@ test_nvgpu_allocator_init.allocator_init=0
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[nvgpu_channel]
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test_ch_referenceable_cleanup.referenceable_cleanup=0
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test_channel_abort.ch_abort=0
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test_channel_abort.ch_abort=2
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test_channel_abort_cleanup.abort_cleanup=0
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test_channel_alloc_inst.alloc_inst=0
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test_channel_close.close=0
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test_channel_debug_dump.debug_dump=0
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test_channel_enable_disable_tsg.enable_disable_tsg=0
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test_channel_close.close=2
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test_channel_debug_dump.debug_dump=2
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test_channel_enable_disable_tsg.enable_disable_tsg=2
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test_channel_from_inst.from_inst=0
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test_channel_from_invalid_id.channel_from_invalid_id=0
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test_channel_mark_error.mark_error=0
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@@ -730,7 +730,7 @@ test_gv11b_fifo_is_preempt_pending.is_preempt_pending=2
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test_gv11b_fifo_preempt_channel.preempt_channel=0
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test_gv11b_fifo_preempt_runlists_for_rc.preempt_runlists_for_rc=0
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test_gv11b_fifo_preempt_trigger.preempt_trigger=0
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test_gv11b_fifo_preempt_tsg.preempt_tsg=0
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test_gv11b_fifo_preempt_tsg.preempt_tsg=2
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[nvgpu_ramfc_gp10b]
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test_gp10b_ramfc_commit_userd.commit_userd=0
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@@ -763,28 +763,28 @@ test_nvgpu_sgt_get_next.sgt_get_next=0
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[nvgpu_tsg]
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test_fifo_init_support.init_support=0
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test_fifo_remove_support.remove_support=0
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test_tsg_abort.abort=0
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test_fifo_remove_support.remove_support=2
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test_tsg_abort.abort=2
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test_tsg_bind_channel.bind_channel=2
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test_tsg_check_and_get_from_id.get_from_id=0
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test_tsg_enable.enable_disable=0
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test_tsg_mark_error.mark_error=0
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test_tsg_enable.enable_disable=2
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test_tsg_mark_error.mark_error=2
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test_tsg_open.open=0
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test_tsg_release.release=0
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test_tsg_reset_faulted_eng_pbdma.reset_faulted_eng_pbdma=0
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test_tsg_set_ctx_mmu_error.set_ctx_mmu_error=0
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test_tsg_reset_faulted_eng_pbdma.reset_faulted_eng_pbdma=2
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test_tsg_set_ctx_mmu_error.set_ctx_mmu_error=2
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test_tsg_setup_sw.setup_sw=0
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test_tsg_unbind_channel.unbind_channel=0
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test_tsg_unbind_channel_check_ctx_reload.unbind_channel_check_ctx_reload=0
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test_tsg_unbind_channel_check_hw_state.unbind_channel_check_hw_state=0
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test_tsg_unbind_channel.unbind_channel=2
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test_tsg_unbind_channel_check_ctx_reload.unbind_channel_check_ctx_reload=2
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test_tsg_unbind_channel_check_hw_state.unbind_channel_check_hw_state=2
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[nvgpu_tsg_gv11b]
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test_fifo_init_support.init_support=0
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test_fifo_remove_support.remove_support=0
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test_gv11b_tsg_bind_channel_eng_method_buffers.gv11b_tsg_bind_channel_eng_method_buffers=0
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test_gv11b_tsg_enable.gv11b_tsg_enable=0
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test_gv11b_tsg_bind_channel_eng_method_buffers.gv11b_tsg_bind_channel_eng_method_buffers=2
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test_gv11b_tsg_enable.gv11b_tsg_enable=2
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test_gv11b_tsg_init_eng_method_buffers.gv11b_tsg_init_eng_method_buffers=0
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test_gv11b_tsg_unbind_channel_check_eng_faulted.gv11b_tsg_unbind_channel_check_eng_faulted=0
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test_gv11b_tsg_unbind_channel_check_eng_faulted.gv11b_tsg_unbind_channel_check_eng_faulted=2
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[nvgpu_userd_gk20a]
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test_gk20a_userd_entry_size.entry_size=0
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@@ -2160,20 +2160,20 @@ struct unit_module_test nvgpu_channel_tests[] = {
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UNIT_TEST(setup_sw, test_channel_setup_sw, &unit_ctx, 0),
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UNIT_TEST(init_support, test_fifo_init_support, &unit_ctx, 0),
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UNIT_TEST(open, test_channel_open, &unit_ctx, 0),
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UNIT_TEST(close, test_channel_close, &unit_ctx, 0),
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UNIT_TEST(close, test_channel_close, &unit_ctx, 2),
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UNIT_TEST(setup_bind, test_channel_setup_bind, &unit_ctx, 0),
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UNIT_TEST(alloc_inst, test_channel_alloc_inst, &unit_ctx, 0),
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UNIT_TEST(from_inst, test_channel_from_inst, &unit_ctx, 0),
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UNIT_TEST(enable_disable_tsg,
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test_channel_enable_disable_tsg, &unit_ctx, 0),
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UNIT_TEST(ch_abort, test_channel_abort, &unit_ctx, 0),
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test_channel_enable_disable_tsg, &unit_ctx, 2),
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UNIT_TEST(ch_abort, test_channel_abort, &unit_ctx, 2),
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UNIT_TEST(mark_error, test_channel_mark_error, &unit_ctx, 0),
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UNIT_TEST(sw_quiesce, test_channel_sw_quiesce, &unit_ctx, 0),
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#ifdef CONFIG_NVGPU_DETERMINISTIC_CHANNELS
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UNIT_TEST(idle_unidle, test_channel_deterministic_idle_unidle, &unit_ctx, 0),
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#endif
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UNIT_TEST(suspend_resume, test_channel_suspend_resume_serviceable_chs, &unit_ctx, 0),
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UNIT_TEST(debug_dump, test_channel_debug_dump, &unit_ctx, 0),
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UNIT_TEST(debug_dump, test_channel_debug_dump, &unit_ctx, 2),
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UNIT_TEST(semaphore_wakeup, test_channel_semaphore_wakeup, &unit_ctx, 0),
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UNIT_TEST(channel_from_invalid_id, test_channel_from_invalid_id, &unit_ctx, 0),
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UNIT_TEST(nvgpu_channel_from_chid_bvec, test_nvgpu_channel_from_id_bvec, &unit_ctx, 0),
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@@ -517,7 +517,7 @@ struct unit_module_test nvgpu_preempt_gv11b_tests[] = {
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UNIT_TEST(preempt_trigger, test_gv11b_fifo_preempt_trigger, NULL, 0),
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UNIT_TEST(preempt_runlists_for_rc, test_gv11b_fifo_preempt_runlists_for_rc, NULL, 0),
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UNIT_TEST(preempt_channel, test_gv11b_fifo_preempt_channel, NULL, 0),
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UNIT_TEST(preempt_tsg, test_gv11b_fifo_preempt_tsg, NULL, 0),
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UNIT_TEST(preempt_tsg, test_gv11b_fifo_preempt_tsg, NULL, 2),
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UNIT_TEST(is_preempt_pending, test_gv11b_fifo_is_preempt_pending, NULL, 2),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),
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};
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -443,13 +443,13 @@ done:
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struct unit_module_test nvgpu_tsg_gv11b_tests[] = {
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UNIT_TEST(init_support, test_fifo_init_support, &unit_ctx, 0),
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UNIT_TEST(gv11b_tsg_enable, test_gv11b_tsg_enable, &unit_ctx, 0),
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UNIT_TEST(gv11b_tsg_enable, test_gv11b_tsg_enable, &unit_ctx, 2),
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UNIT_TEST(gv11b_tsg_init_eng_method_buffers, \
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test_gv11b_tsg_init_eng_method_buffers, &unit_ctx, 0),
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UNIT_TEST(gv11b_tsg_bind_channel_eng_method_buffers,
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test_gv11b_tsg_bind_channel_eng_method_buffers, &unit_ctx, 0),
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test_gv11b_tsg_bind_channel_eng_method_buffers, &unit_ctx, 2),
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UNIT_TEST(gv11b_tsg_unbind_channel_check_eng_faulted, \
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test_gv11b_tsg_unbind_channel_check_eng_faulted, &unit_ctx, 0),
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test_gv11b_tsg_unbind_channel_check_eng_faulted, &unit_ctx, 2),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),
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};
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@@ -1797,19 +1797,19 @@ struct unit_module_test nvgpu_tsg_tests[] = {
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UNIT_TEST(get_from_id, test_tsg_check_and_get_from_id, &unit_ctx, 0),
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UNIT_TEST(get_from_id_bvec, test_tsg_check_and_get_from_id_bvec, &unit_ctx, 0),
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UNIT_TEST(bind_channel, test_tsg_bind_channel, &unit_ctx, 2),
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UNIT_TEST(unbind_channel, test_tsg_unbind_channel, &unit_ctx, 0),
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UNIT_TEST(unbind_channel, test_tsg_unbind_channel, &unit_ctx, 2),
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UNIT_TEST(unbind_channel_check_hw_state,
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test_tsg_unbind_channel_check_hw_state, &unit_ctx, 0),
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UNIT_TEST(sm_error_states, test_tsg_sm_error_state_set_get, &unit_ctx, 0),
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test_tsg_unbind_channel_check_hw_state, &unit_ctx, 2),
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UNIT_TEST(sm_error_states, test_tsg_sm_error_state_set_get, &unit_ctx, 2),
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UNIT_TEST(unbind_channel_check_ctx_reload,
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test_tsg_unbind_channel_check_ctx_reload, &unit_ctx, 0),
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UNIT_TEST(enable_disable, test_tsg_enable, &unit_ctx, 0),
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UNIT_TEST(abort, test_tsg_abort, &unit_ctx, 0),
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UNIT_TEST(mark_error, test_tsg_mark_error, &unit_ctx, 0),
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UNIT_TEST(bvec_nvgpu_tsg_set_error_notifier, test_nvgpu_tsg_set_error_notifier_bvec, &unit_ctx, 0),
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UNIT_TEST(set_ctx_mmu_error, test_tsg_set_ctx_mmu_error, &unit_ctx, 0),
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UNIT_TEST(reset_faulted_eng_pbdma, test_tsg_reset_faulted_eng_pbdma, &unit_ctx, 0),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),
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test_tsg_unbind_channel_check_ctx_reload, &unit_ctx, 2),
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UNIT_TEST(enable_disable, test_tsg_enable, &unit_ctx, 2),
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UNIT_TEST(abort, test_tsg_abort, &unit_ctx, 2),
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UNIT_TEST(mark_error, test_tsg_mark_error, &unit_ctx, 2),
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UNIT_TEST(bvec_nvgpu_tsg_set_error_notifier, test_nvgpu_tsg_set_error_notifier_bvec, &unit_ctx, 2),
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UNIT_TEST(set_ctx_mmu_error, test_tsg_set_ctx_mmu_error, &unit_ctx, 2),
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UNIT_TEST(reset_faulted_eng_pbdma, test_tsg_reset_faulted_eng_pbdma, &unit_ctx, 2),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 2),
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};
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UNIT_MODULE(nvgpu_tsg, nvgpu_tsg_tests, UNIT_PRIO_NVGPU_TEST);
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@@ -596,7 +596,7 @@ struct unit_module_test nvgpu_rc_tests[] = {
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UNIT_TEST(rc_mmu_fault, test_rc_mmu_fault, NULL, 0),
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UNIT_TEST(rc_mmu_fault_bvec, test_rc_mmu_fault_bvec, NULL, 0),
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UNIT_TEST(rc_pbdma_fault, test_rc_pbdma_fault, NULL, 0),
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UNIT_TEST(rc_deinit, test_rc_deinit, NULL, 0),
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UNIT_TEST(rc_deinit, test_rc_deinit, NULL, 2),
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};
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UNIT_MODULE(nvgpu-rc, nvgpu_rc_tests, UNIT_PRIO_NVGPU_TEST);
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