From e515ba70983619e33dd1718c4e514bacf10d885a Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Thu, 5 Dec 2019 16:50:56 -0500 Subject: [PATCH] gpu: nvgpu: mc: remove non-fusa HALs Compile out the function mc_gp10b_log_pending_intrs() with the CONFIG_NVGPU_NON_FUSA macro since it isn't used in the FUSA build. JIRA NVGPU-2224 Change-Id: I5b2d465142be7d1bddf114c7374ced7b297c33d0 Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2257127 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/mc/mc_gp10b_fusa.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/nvgpu/hal/mc/mc_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/mc/mc_gp10b_fusa.c index b52567553..47880839b 100644 --- a/drivers/gpu/nvgpu/hal/mc/mc_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/mc/mc_gp10b_fusa.c @@ -267,6 +267,7 @@ bool mc_gp10b_is_intr1_pending(struct gk20a *g, return is_pending; } +#ifdef CONFIG_NVGPU_NON_FUSA void mc_gp10b_log_pending_intrs(struct gk20a *g) { u32 i, intr; @@ -280,6 +281,7 @@ void mc_gp10b_log_pending_intrs(struct gk20a *g) } } +#endif void mc_gp10b_ltc_isr(struct gk20a *g) {