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gpu: nvgpu: Initialize clk counters for dGPU clocks

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Initialize the clock counters for GPCCLK, XBARCLK, SYSCLK.
This INIT was done in PMU before, but now disabled from TU10A profile.
Hence the initialization is moved into nvgpu.

This patch does the following.
1. Move clock files from GV100 to TU104.
2. Add the Counter HW Registers.
3. Initialize the counter registers for gpc, xbar and sysclk.
4. Change the debug fs node from gv100 to tu104.
5. Update in yaml file with new file names.

Bug 200536091

Change-Id: I436019a18f5c4c73979977666d0c04ce4c569047
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2155298
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2019-07-25 11:53:01 +05:30
committed by mobile promotions
parent 1551e7ea3d
commit e58e00b0fb
12 changed files with 179 additions and 51 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/nvgpu/hal/init/hal_tu104.c
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@@ -176,7 +176,7 @@
#include "hal/fifo/channel_gv100.h"
#include "common/clk_arb/clk_arb_gv100.h"
#include "hal/clk/clk_gv100.h"
#include "hal/clk/clk_tu104.h"
#include "hal/fbpa/fbpa_tu104.h"
#include "hal_tu104.h"
@@ -1153,14 +1153,14 @@ static const struct gpu_ops tu104_ops = {
gm20b_clear_pmu_bar0_host_err_status,
},
.clk = {
.init_clk_support = gv100_init_clk_support,
.get_crystal_clk_hz = gv100_crystal_clk_hz,
.get_rate_cntr = gv100_get_rate_cntr,
.measure_freq = gv100_clk_measure_freq,
.suspend_clk_support = gv100_suspend_clk_support,
.init_clk_support = tu104_init_clk_support,
.get_crystal_clk_hz = tu104_crystal_clk_hz,
.get_rate_cntr = tu104_get_rate_cntr,
.measure_freq = tu104_clk_measure_freq,
.suspend_clk_support = tu104_suspend_clk_support,
.perf_pmu_vfe_load = nvgpu_perf_pmu_vfe_load_ps35,
.clk_domain_get_f_points = gv100_clk_domain_get_f_points,
.get_maxrate = gv100_clk_maxrate,
.clk_domain_get_f_points = tu104_clk_domain_get_f_points,
.get_maxrate = tu104_clk_maxrate,
},
#ifdef CONFIG_NVGPU_CLK_ARB
.clk_arb = {