From e5efe0c89a2d4282b8c5e3bb350f297abcf6196c Mon Sep 17 00:00:00 2001 From: Sagar Kadamati Date: Fri, 6 Sep 2019 14:41:33 +0530 Subject: [PATCH] gpu: nvgpu: fix misra violations in tsg.h MISRA C-2012 Rule 10.3 JIRA NVGPU-3900 Change-Id: I5eec50a1aabd4ca766c0f61dbb463c51a30669e6 Signed-off-by: Sagar Kadamati Reviewed-on: https://git-master.nvidia.com/r/2191615 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan Reviewed-by: Scott Long Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/tsg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/tsg.h b/drivers/gpu/nvgpu/include/nvgpu/tsg.h index 9f46201d3..1dc5bef0f 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/tsg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/tsg.h @@ -162,8 +162,8 @@ struct nvgpu_tsg { * TPC PG is specific to chip. */ u32 num_active_tpcs; - /** Set to non-zero if dynamic TPC PG is requested to be enabled. */ - u8 tpc_pg_enabled; + /** Set to true if dynamic TPC PG is requested to be enabled. */ + bool tpc_pg_enabled; /** * Set to true if dynamic TPC PG is enabled and #num_active_tpcs is * non-zero.