From e5f95a9ca2f258aff0a1fb194ae55196e2798006 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Fri, 26 Apr 2019 12:54:04 -0700 Subject: [PATCH] gpu: nvgpu: fix MISRA 10.3 violation in gr falcon Fixed error associated with implicit conversion of un-signed to signed by making all variables involved to un-signed. JIRA NVGPU-3226 Change-Id: I8e2f2a77dd295d0ab56d2572506cb2392f21985f Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/2107661 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c index 7e441536c..9edf758c8 100644 --- a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c @@ -229,18 +229,18 @@ void gm20b_gr_falcon_start_fecs(struct gk20a *g) static void gm20b_gr_falcon_wait_for_fecs_arb_idle(struct gk20a *g) { - int retries = FECS_ARB_CMD_TIMEOUT_MAX_US / + u32 retries = FECS_ARB_CMD_TIMEOUT_MAX_US / FECS_ARB_CMD_TIMEOUT_DEFAULT_US; u32 val; val = nvgpu_readl(g, gr_fecs_arb_ctx_cmd_r()); - while ((gr_fecs_arb_ctx_cmd_cmd_v(val) != 0U) && (retries != 0)) { + while ((gr_fecs_arb_ctx_cmd_cmd_v(val) != 0U) && (retries != 0U)) { nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT_US); retries--; val = nvgpu_readl(g, gr_fecs_arb_ctx_cmd_r()); } - if (retries == 0) { + if (retries == 0U) { nvgpu_err(g, "arbiter cmd timeout, fecs arb ctx cmd: 0x%08x", nvgpu_readl(g, gr_fecs_arb_ctx_cmd_r())); } @@ -249,11 +249,11 @@ static void gm20b_gr_falcon_wait_for_fecs_arb_idle(struct gk20a *g) FECS_ARB_CMD_TIMEOUT_DEFAULT_US; while (((nvgpu_readl(g, gr_fecs_ctxsw_status_1_r()) & gr_fecs_ctxsw_status_1_arb_busy_m()) != 0U) && - (retries != 0)) { + (retries != 0U)) { nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT_US); retries--; } - if (retries == 0) { + if (retries == 0U) { nvgpu_err(g, "arbiter idle timeout, fecs ctxsw status: 0x%08x", nvgpu_readl(g, gr_fecs_ctxsw_status_1_r())); @@ -271,11 +271,11 @@ void gm20b_gr_falcon_bind_instblk(struct gk20a *g, while (((nvgpu_readl(g, gr_fecs_ctxsw_status_1_r()) & gr_fecs_ctxsw_status_1_arb_busy_m()) != 0U) && - (retries != 0)) { + (retries != 0U)) { nvgpu_udelay(FECS_ARB_CMD_TIMEOUT_DEFAULT_US); retries--; } - if (retries == 0) { + if (retries == 0U) { nvgpu_err(g, "arbiter idle timeout, status: %08x", nvgpu_readl(g, gr_fecs_ctxsw_status_1_r()));