From e62785190f74cfbf9003a190a768e9077373bf6f Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 10 Aug 2018 08:28:23 -0700 Subject: [PATCH] gpu: nvgpu: Move priv_ring HAL to common Move implementation of priv_ring HAL to common/priv_ring. Implement two new HAL APIs to remove illegal dependencies: enable_priv_ring and enum_ltc. As enum_ltc can be implemented only gm20b onwards, bump gk20a implementation to base on gm20b. JIRA NVGPU-964 Change-Id: I160c2216132aadbcd98bb4a688aeeb2c520a9bc0 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1797025 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile | 4 +-- drivers/gpu/nvgpu/Makefile.sources | 4 +-- .../priv_ring/priv_ring_gm20b.c} | 26 ++++++++++--------- .../priv_ring/priv_ring_gm20b.h} | 19 +++++++------- .../priv_ring}/priv_ring_gp10b.c | 1 - .../priv_ring}/priv_ring_gp10b.h | 0 drivers/gpu/nvgpu/gk20a/gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gk20a.h | 3 ++- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 8 +++--- drivers/gpu/nvgpu/gp106/hal_gp106.c | 8 +++--- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 7 +++-- drivers/gpu/nvgpu/gv100/hal_gv100.c | 7 +++-- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 7 +++-- drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | 3 +-- drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 7 +++-- drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 7 +++-- 16 files changed, 66 insertions(+), 47 deletions(-) rename drivers/gpu/nvgpu/{gk20a/priv_ring_gk20a.c => common/priv_ring/priv_ring_gm20b.c} (88%) rename drivers/gpu/nvgpu/{gk20a/priv_ring_gk20a.h => common/priv_ring/priv_ring_gm20b.h} (75%) rename drivers/gpu/nvgpu/{gp10b => common/priv_ring}/priv_ring_gp10b.c (99%) rename drivers/gpu/nvgpu/{gp10b => common/priv_ring}/priv_ring_gp10b.h (100%) diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 6a075ce44..8c2899471 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -27,6 +27,8 @@ nvgpu-y += common/bus/bus_gk20a.o \ common/bus/bus_gm20b.o \ common/bus/bus_gp10b.o \ common/bus/bus_gv100.o \ + common/priv_ring/priv_ring_gm20b.o \ + common/priv_ring/priv_ring_gp10b.o \ common/ptimer/ptimer.o \ common/ptimer/ptimer_gk20a.o \ common/fb/fb_gk20a.o \ @@ -201,7 +203,6 @@ nvgpu-y += \ gk20a/mm_gk20a.o \ gk20a/pmu_gk20a.o \ gk20a/flcn_gk20a.o \ - gk20a/priv_ring_gk20a.o \ gk20a/fence_gk20a.o \ gk20a/therm_gk20a.o \ gk20a/gr_ctx_gk20a_sim.o \ @@ -269,7 +270,6 @@ nvgpu-y += \ gp10b/regops_gp10b.o \ gp10b/therm_gp10b.o \ gp10b/fecs_trace_gp10b.o \ - gp10b/priv_ring_gp10b.o \ gp10b/gp10b.o \ gp10b/fuse_gp10b.o \ gp10b/ecc_gp10b.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 677b20bdf..e8e107aeb 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -36,6 +36,8 @@ srcs := common/mm/nvgpu_allocator.c \ common/bus/bus_gm20b.c \ common/bus/bus_gp10b.c \ common/bus/bus_gv100.c \ + common/priv_ring/priv_ring_gm20b.c \ + common/priv_ring/priv_ring_gp10b.c \ common/fb/fb_gk20a.c \ common/fb/fb_gm20b.c \ common/fb/fb_gp10b.c \ @@ -135,7 +137,6 @@ srcs := common/mm/nvgpu_allocator.c \ gk20a/mm_gk20a.c \ gk20a/pmu_gk20a.c \ gk20a/flcn_gk20a.c \ - gk20a/priv_ring_gk20a.c \ gk20a/fence_gk20a.c \ gk20a/therm_gk20a.c \ gk20a/gr_ctx_gk20a_sim.c \ @@ -167,7 +168,6 @@ srcs := common/mm/nvgpu_allocator.c \ gp10b/regops_gp10b.c \ gp10b/therm_gp10b.c \ gp10b/fecs_trace_gp10b.c \ - gp10b/priv_ring_gp10b.c \ gp10b/gp10b.c \ gp10b/fuse_gp10b.c \ gp10b/ecc_gp10b.c \ diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c similarity index 88% rename from drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c rename to drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c index 0e004a5d1..1445473a0 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c @@ -1,6 +1,4 @@ /* - * GK20A priv ring - * * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -22,7 +20,7 @@ * DEALINGS IN THE SOFTWARE. */ -#include "gk20a.h" +#include "gk20a/gk20a.h" #include #include @@ -30,13 +28,13 @@ #include #include -#include -#include -#include -#include -#include +#include "priv_ring_gm20b.h" -void gk20a_enable_priv_ring(struct gk20a *g) +#include +#include +#include + +void gm20b_priv_ring_enable(struct gk20a *g) { if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) return; @@ -55,7 +53,7 @@ void gk20a_enable_priv_ring(struct gk20a *g) gk20a_readl(g, pri_ringstation_sys_decode_config_r()); } -void gk20a_priv_ring_isr(struct gk20a *g) +void gm20b_priv_ring_isr(struct gk20a *g) { u32 status0, status1; u32 cmd; @@ -107,7 +105,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) nvgpu_warn(g, "priv ringmaster intr ack too many retries"); } -void gk20a_priv_set_timeout_settings(struct gk20a *g) +void gm20b_priv_set_timeout_settings(struct gk20a *g) { /* * Bug 1340570: increase the clock timeout to avoid potential @@ -115,5 +113,9 @@ void gk20a_priv_set_timeout_settings(struct gk20a *g) */ nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); - nvgpu_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); +} + +u32 gm20b_priv_ring_enum_ltc(struct gk20a *g) +{ + return gk20a_readl(g, pri_ringmaster_enum_ltc_r()); } diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h similarity index 75% rename from drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h rename to drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h index 98040624a..02f205151 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h @@ -1,7 +1,5 @@ /* - * GK20A PRIV ringmaster - * - * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -21,13 +19,14 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#ifndef __PRIV_RING_GK20A_H__ -#define __PRIV_RING_GK20A_H__ +#ifndef __PRIV_RING_GM20B_H__ +#define __PRIV_RING_GM20B_H__ -struct gpu_ops; +struct gk20a; -void gk20a_priv_ring_isr(struct gk20a *g); -void gk20a_enable_priv_ring(struct gk20a *g); -void gk20a_priv_set_timeout_settings(struct gk20a *g); +void gm20b_priv_ring_isr(struct gk20a *g); +void gm20b_priv_ring_enable(struct gk20a *g); +void gm20b_priv_set_timeout_settings(struct gk20a *g); +u32 gm20b_priv_ring_enum_ltc(struct gk20a *g); -#endif /*__PRIV_RING_GK20A_H__*/ +#endif /*__PRIV_RING_GM20B_H__*/ diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c similarity index 99% rename from drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c rename to drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c index 9fcf060b0..045253759 100644 --- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c @@ -30,7 +30,6 @@ #include #include -#include #include #include #include diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h similarity index 100% rename from drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h rename to drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 7fec4da7e..24cfc6ecd 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -187,7 +187,7 @@ int gk20a_finalize_poweron(struct gk20a *g) if (g->ops.clk.disable_slowboot) g->ops.clk.disable_slowboot(g); - gk20a_enable_priv_ring(g); + g->ops.priv_ring.enable_priv_ring(g); /* TBD: move this after graphics init in which blcg/slcg is enabled. This function removes SlowdownOnBoot which applies 32x divider diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index bd4772084..c29c03f0d 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -69,7 +69,6 @@ struct nvgpu_ctxsw_trace_filter; #include "fifo_gk20a.h" #include "tsg_gk20a.h" #include "pmu_gk20a.h" -#include "priv_ring_gk20a.h" #include "therm_gk20a.h" #include "clk/clk.h" #include "perf/perf.h" @@ -1235,9 +1234,11 @@ struct gpu_ops { void (*falcon_hal_sw_init)(struct nvgpu_falcon *flcn); } falcon; struct { + void (*enable_priv_ring)(struct gk20a *g); void (*isr)(struct gk20a *g); void (*decode_error_code)(struct gk20a *g, u32 error_code); void (*set_ppriv_timeout_settings)(struct gk20a *g); + u32 (*enum_ltc)(struct gk20a *g); } priv_ring; struct { int (*check_priv_security)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index b37f62446..e6c4c8d16 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -25,6 +25,7 @@ #include "common/clock_gating/gm20b_gating_reglist.h" #include "common/bus/bus_gm20b.h" #include "common/bus/bus_gk20a.h" +#include "common/priv_ring/priv_ring_gm20b.h" #include "common/ptimer/ptimer_gk20a.h" #include "common/fb/fb_gk20a.h" #include "common/fb/fb_gm20b.h" @@ -38,7 +39,6 @@ #include "gk20a/css_gr_gk20a.h" #include "gk20a/mc_gk20a.h" #include "gk20a/flcn_gk20a.h" -#include "gk20a/priv_ring_gk20a.h" #include "gk20a/regops_gk20a.h" #include "gk20a/pmu_gk20a.h" #include "gk20a/gr_gk20a.h" @@ -641,9 +641,11 @@ static const struct gpu_ops gm20b_ops = { .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, }, .priv_ring = { - .isr = gk20a_priv_ring_isr, + .enable_priv_ring = gm20b_priv_ring_enable, + .isr = gm20b_priv_ring_isr, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .check_priv_security = gm20b_fuse_check_priv_security, diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index a2e76a00f..90d25fa02 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -27,6 +27,8 @@ #include "common/ptimer/ptimer_gk20a.h" #include "common/bus/bus_gm20b.h" #include "common/bus/bus_gp10b.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/fb/fb_gk20a.h" #include "common/fb/fb_gp10b.h" #include "common/fb/fb_gm20b.h" @@ -52,11 +54,9 @@ #include "gp10b/mm_gp10b.h" #include "gp10b/ce_gp10b.h" #include "gp10b/regops_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/fifo_gp10b.h" #include "gp10b/pmu_gp10b.h" #include "gp10b/gr_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/fuse_gp10b.h" #include "gp106/fifo_gp106.h" @@ -774,10 +774,12 @@ static const struct gpu_ops gp106_ops = { .falcon_hal_sw_init = gp106_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .decode_error_code = gp10b_priv_ring_decode_error_code, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .check_priv_security = gp106_fuse_check_priv_security, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 3d5eb2311..5f55baa37 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -27,6 +27,8 @@ #include "common/ptimer/ptimer_gk20a.h" #include "common/bus/bus_gm20b.h" #include "common/bus/bus_gp10b.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/fb/fb_gk20a.h" #include "common/fb/fb_gm20b.h" #include "common/fb/fb_gp10b.h" @@ -55,7 +57,6 @@ #include "gp10b/fifo_gp10b.h" #include "gp10b/regops_gp10b.h" #include "gp10b/therm_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/ecc_gp10b.h" #include "gm20b/ltc_gm20b.h" @@ -687,10 +688,12 @@ static const struct gpu_ops gp10b_ops = { .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .decode_error_code = gp10b_priv_ring_decode_error_code, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .check_priv_security = gp10b_fuse_check_priv_security, diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index f6c3ec678..344ad1e83 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -25,6 +25,8 @@ #include "common/bus/bus_gk20a.h" #include "common/bus/bus_gp10b.h" #include "common/bus/bus_gv100.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/clock_gating/gv100_gating_reglist.h" #include "common/ptimer/ptimer_gk20a.h" #include "common/fb/fb_gk20a.h" @@ -68,7 +70,6 @@ #include "gp10b/therm_gp10b.h" #include "gp10b/mc_gp10b.h" #include "gp10b/ce_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/fifo_gp10b.h" #include "gp10b/fecs_trace_gp10b.h" #include "gp10b/mm_gp10b.h" @@ -868,10 +869,12 @@ static const struct gpu_ops gv100_ops = { .falcon_hal_sw_init = gv100_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .decode_error_code = gp10b_priv_ring_decode_error_code, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 20a0b34fa..05763ccef 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -25,6 +25,8 @@ #include "common/bus/bus_gk20a.h" #include "common/bus/bus_gp10b.h" #include "common/bus/bus_gm20b.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/clock_gating/gv11b_gating_reglist.h" #include "common/ptimer/ptimer_gk20a.h" #include "common/fb/fb_gk20a.h" @@ -55,7 +57,6 @@ #include "gp10b/therm_gp10b.h" #include "gp10b/mc_gp10b.h" #include "gp10b/ce_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/fifo_gp10b.h" #include "gp10b/fecs_trace_gp10b.h" #include "gp10b/mm_gp10b.h" @@ -786,10 +787,12 @@ static const struct gpu_ops gv11b_ops = { .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .decode_error_code = gp10b_priv_ring_decode_error_code, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .check_priv_security = gp10b_fuse_check_priv_security, diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index 32f722080..d7c385a9d 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c @@ -32,7 +32,6 @@ #include #include #include -#include #include @@ -62,7 +61,7 @@ void gv11b_ltc_init_fs_state(struct gk20a *g) nvgpu_log_info(g, "initialize gv11b l2"); g->max_ltc_count = gk20a_readl(g, top_num_ltcs_r()); - g->ltc_count = gk20a_readl(g, pri_ringmaster_enum_ltc_r()); + g->ltc_count = g->ops.priv_ring.enum_ltc(g); nvgpu_log_info(g, "%u ltcs out of %u", g->ltc_count, g->max_ltc_count); reg = gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r()); diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index a8aa023b4..15e2717db 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c @@ -22,6 +22,8 @@ #include "common/bus/bus_gk20a.h" #include "common/bus/bus_gm20b.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/clock_gating/gp10b_gating_reglist.h" #include "common/fb/fb_gk20a.h" #include "common/fb/fb_gm20b.h" @@ -55,7 +57,6 @@ #include "gp10b/fifo_gp10b.h" #include "gp10b/regops_gp10b.h" #include "gp10b/therm_gp10b.h" -#include "gp10b/priv_ring_gp10b.h" #include "gp10b/fuse_gp10b.h" #include "gm20b/ltc_gm20b.h" @@ -552,9 +553,11 @@ static const struct gpu_ops vgpu_gp10b_ops = { .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .check_priv_security = vgpu_gp10b_fuse_check_priv_security, diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index b91691e26..995a2c2c1 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c @@ -22,6 +22,8 @@ #include "common/bus/bus_gk20a.h" #include "common/bus/bus_gm20b.h" +#include "common/priv_ring/priv_ring_gm20b.h" +#include "common/priv_ring/priv_ring_gp10b.h" #include "common/clock_gating/gv11b_gating_reglist.h" #include "common/fb/fb_gk20a.h" #include "common/fb/fb_gm20b.h" @@ -62,7 +64,6 @@ #include "gp10b/gr_gp10b.h" #include #include -#include #include #include @@ -622,9 +623,11 @@ static const struct gpu_ops vgpu_gv11b_ops = { .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, }, .priv_ring = { + .enable_priv_ring = gm20b_priv_ring_enable, .isr = gp10b_priv_ring_isr, .set_ppriv_timeout_settings = - gk20a_priv_set_timeout_settings, + gm20b_priv_set_timeout_settings, + .enum_ltc = gm20b_priv_ring_enum_ltc, }, .fuse = { .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable,