diff --git a/drivers/gpu/nvgpu/common/engine_queues/engine_fb_queue.c b/drivers/gpu/nvgpu/common/engine_queues/engine_fb_queue.c index f89ed701c..36bdef894 100644 --- a/drivers/gpu/nvgpu/common/engine_queues/engine_fb_queue.c +++ b/drivers/gpu/nvgpu/common/engine_queues/engine_fb_queue.c @@ -23,12 +23,12 @@ #include #include #include -#include #include #include #include #include #include +#include #include #include "engine_fb_queue_priv.h" diff --git a/drivers/gpu/nvgpu/common/engine_queues/engine_mem_queue.c b/drivers/gpu/nvgpu/common/engine_queues/engine_mem_queue.c index 32052932e..a7f094a36 100644 --- a/drivers/gpu/nvgpu/common/engine_queues/engine_mem_queue.c +++ b/drivers/gpu/nvgpu/common/engine_queues/engine_mem_queue.c @@ -22,6 +22,7 @@ #include #include +#include #include "engine_mem_queue_priv.h" #include "engine_dmem_queue.h" diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c index 2fd19c698..1f9701a2f 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_gk20a.c b/drivers/gpu/nvgpu/common/pmu/pmu_gk20a.c index d2e3ab38b..2066c0ba0 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_gk20a.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index 53de5574b..7e0466396 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/sec2/sec2.c b/drivers/gpu/nvgpu/common/sec2/sec2.c index 558bd38a1..9c8daf267 100644 --- a/drivers/gpu/nvgpu/common/sec2/sec2.c +++ b/drivers/gpu/nvgpu/common/sec2/sec2.c @@ -26,6 +26,7 @@ #include #include #include +#include /* sec2 falcon queue init */ int nvgpu_sec2_queue_init(struct nvgpu_sec2 *sec2, u32 id, diff --git a/drivers/gpu/nvgpu/common/sec2/sec2_ipc.c b/drivers/gpu/nvgpu/common/sec2/sec2_ipc.c index 2dee4f56d..18c6ac498 100644 --- a/drivers/gpu/nvgpu/common/sec2/sec2_ipc.c +++ b/drivers/gpu/nvgpu/common/sec2/sec2_ipc.c @@ -28,6 +28,7 @@ #include #include #include +#include static int sec2_seq_acquire(struct nvgpu_sec2 *sec2, struct sec2_sequence **pseq) diff --git a/drivers/gpu/nvgpu/include/nvgpu/engine_mem_queue.h b/drivers/gpu/nvgpu/include/nvgpu/engine_mem_queue.h index 402183842..a1352efaf 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/engine_mem_queue.h +++ b/drivers/gpu/nvgpu/include/nvgpu/engine_mem_queue.h @@ -25,11 +25,6 @@ #include -/* Queue Type */ -#define QUEUE_TYPE_DMEM 0x0U -#define QUEUE_TYPE_EMEM 0x1U -#define QUEUE_TYPE_FB 0x2U - struct nvgpu_falcon; struct nvgpu_engine_mem_queue; diff --git a/drivers/gpu/nvgpu/include/nvgpu/engine_queue.h b/drivers/gpu/nvgpu/include/nvgpu/engine_queue.h new file mode 100644 index 000000000..461e863a3 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/engine_queue.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef NVGPU_ENGINE_QUEUE_H +#define NVGPU_ENGINE_QUEUE_H + +/* Queue Type */ +#define QUEUE_TYPE_DMEM 0x0U +#define QUEUE_TYPE_EMEM 0x1U +#define QUEUE_TYPE_FB 0x2U + +#define OFLAG_READ 0U +#define OFLAG_WRITE 1U + +#define QUEUE_SET (true) +#define QUEUE_GET (false) + +#define QUEUE_ALIGNMENT (4U) + +#endif /* NVGPU_ENGINE_QUEUE_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h index 00339007b..f07cda32c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_cmn.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -44,14 +44,6 @@ #define PMU_IS_MESSAGE_QUEUE(id) \ ((id) == PMU_MESSAGE_QUEUE) -#define OFLAG_READ 0U -#define OFLAG_WRITE 1U - -#define QUEUE_SET (true) -#define QUEUE_GET (false) - -#define QUEUE_ALIGNMENT (4U) - /* An enumeration containing all valid logical mutex identifiers */ enum { PMU_MUTEX_ID_RSVD1 = 0,