From e8a356548e6b6fd1546d83b5c99de78b632555f6 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Wed, 28 Oct 2020 11:34:52 -0700 Subject: [PATCH] gpu: nvgpu: vgpu: add runlist_id to cmd TEGRA_VGPU_CMD_CHANNEL_ALLOC_HWCTX Server side needs channel runlist_id to do channel operations. Jira GVSCI-8166 Signed-off-by: Richard Zhao Change-Id: Ie51f7263851d24d95756bd60f29ba01fdc13ec49 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2438020 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.c | 1 + drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.c index cdb5d2bbb..dfeb9d869 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/channel_vgpu.c @@ -81,6 +81,7 @@ int vgpu_channel_alloc_inst(struct gk20a *g, struct nvgpu_channel *ch) msg.cmd = TEGRA_VGPU_CMD_CHANNEL_ALLOC_HWCTX; msg.handle = vgpu_get_handle(g); p->id = ch->chid; + p->runlist_id = ch->runlist_id; p->pid = (u64)ch->pid; err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); if (err || msg.ret) { diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h index b6b896ce3..20d0e1bf1 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h @@ -128,6 +128,7 @@ struct tegra_vgpu_connect_params { struct tegra_vgpu_channel_hwctx_params { u32 id; + u32 runlist_id; u64 pid; u64 handle; };