From e9563e40d1a8c0edb7233e7601ac125a0cbaeaeb Mon Sep 17 00:00:00 2001 From: Divya Date: Wed, 9 Mar 2022 06:55:39 +0000 Subject: [PATCH] gpu: nvgpu: add GSP and CTRL CG support Add SLCG clock gating support for GSP and CTRL units Bug 3452217 Change-Id: Ic014fc03c8f4ad951b1fba8ab7b3e1cd1a23a59c Signed-off-by: Divya Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2678680 Reviewed-by: svcacv Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-cert Reviewed-by: Deepak Goyal Reviewed-by: Deepak Nibade GVS: Gerrit_Virtual_Submit --- .../power_features/cg/ga10b_gating_reglist.c | 68 ++++++++++++++++++- .../power_features/cg/ga10b_gating_reglist.h | 12 +++- 2 files changed, 78 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.c b/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.c index e80309a29..1c58b56eb 100644 --- a/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.c +++ b/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.c @@ -31,7 +31,6 @@ #include #include #include - #include "hal/power_features/cg/gating_reglist.h" #include "ga10b_gating_reglist.h" @@ -168,6 +167,19 @@ static const struct gating_desc ga10b_slcg_hshub[] = { {.addr = 0x00004bf4U, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; +/* slcg Ctrl */ +static const struct gating_desc ga10b_slcg_ctrl[] = { + {.addr = 0x00b66a00U, .prod = 0x00000000U, .disable = 0x00000006U}, +}; + +/* slcg GSP */ +static const struct gating_desc ga10b_slcg_gsp[] = { + {.addr = 0x00110134U, .prod = 0x00040140U, .disable = 0x0003fffeU}, + {.addr = 0x00110674U, .prod = 0x00000000U, .disable = 0x0000000fU}, + {.addr = 0x00110e28U, .prod = 0x00000000U, .disable = 0x00000001U}, + {.addr = 0x0011083cU, .prod = 0x000000feU, .disable = 0x800000ffU}, +}; + /* slcg timer */ static const struct gating_desc ga10b_slcg_timer[] = { {.addr = 0x00009600U, .prod = 0x00000000U, .disable = 0x00000002U}, @@ -881,6 +893,60 @@ const struct gating_desc *ga10b_slcg_hshub_get_gating_prod(void) return ga10b_slcg_hshub; } +void ga10b_slcg_ctrl_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = nvgpu_safe_cast_u64_to_u32(sizeof(ga10b_slcg_ctrl) + / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0U; i < size; i++) { + u32 reg = ga10b_slcg_ctrl[i].addr; + u32 val = prod ? ga10b_slcg_ctrl[i].prod : + ga10b_slcg_ctrl[i].disable; + nvgpu_writel(g, reg, val); + } + } +} + +u32 ga10b_slcg_ctrl_gating_prod_size(void) +{ + return nvgpu_safe_cast_u64_to_u32(ARRAY_SIZE(ga10b_slcg_ctrl)); +} + +const struct gating_desc *ga10b_slcg_ctrl_get_gating_prod(void) +{ + return ga10b_slcg_ctrl; +} + +void ga10b_slcg_gsp_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = nvgpu_safe_cast_u64_to_u32(sizeof(ga10b_slcg_gsp) + / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0U; i < size; i++) { + u32 reg = ga10b_slcg_gsp[i].addr; + u32 val = prod ? ga10b_slcg_gsp[i].prod : + ga10b_slcg_gsp[i].disable; + nvgpu_writel(g, reg, val); + } + } +} + +u32 ga10b_slcg_gsp_gating_prod_size(void) +{ + return nvgpu_safe_cast_u64_to_u32(ARRAY_SIZE(ga10b_slcg_gsp)); +} + +const struct gating_desc *ga10b_slcg_gsp_get_gating_prod(void) +{ + return ga10b_slcg_gsp; +} + void ga10b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { diff --git a/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.h b/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.h index 5041a65d9..ff67211f8 100644 --- a/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.h +++ b/drivers/gpu/nvgpu/hal/power_features/cg/ga10b_gating_reglist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -130,6 +130,16 @@ void ga10b_slcg_hshub_load_gating_prod(struct gk20a *g, u32 ga10b_slcg_hshub_gating_prod_size(void); const struct gating_desc *ga10b_slcg_hshub_get_gating_prod(void); +void ga10b_slcg_ctrl_load_gating_prod(struct gk20a *g, + bool prod); +u32 ga10b_slcg_ctrl_gating_prod_size(void); +const struct gating_desc *ga10b_slcg_ctrl_get_gating_prod(void); + +void ga10b_slcg_gsp_load_gating_prod(struct gk20a *g, + bool prod); +u32 ga10b_slcg_gsp_gating_prod_size(void); +const struct gating_desc *ga10b_slcg_gsp_get_gating_prod(void); + void ga10b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod); u32 ga10b_blcg_bus_gating_prod_size(void);