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gpu: nvgpu: secure boot HAL update
Updated/added secure boot HAL with methods required to support multiple GPU chips. JIRA DNVGPU-10 Change-Id: I343b289f2236fd6a6b0ecf9115367ce19990e7d5 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1151784 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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committed by
Terje Bergstrom
parent
ad24c028db
commit
e9d5e7dfca
@@ -534,6 +534,25 @@ struct gpu_ops {
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(struct gk20a *g, u32 mask);
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void (*dump_secure_fuses)(struct gk20a *g);
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int (*reset)(struct gk20a *g);
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int (*falcon_wait_for_halt)(struct gk20a *g,
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unsigned int timeout);
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int (*falcon_clear_halt_interrupt_status)(struct gk20a *g,
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unsigned int timeout);
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int (*init_falcon_setup_hw)(struct gk20a *g,
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struct flcn_bl_dmem_desc *desc, u32 bl_sz);
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bool (*is_lazy_bootstrap)(u32 falcon_id);
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bool (*is_priv_load)(u32 falcon_id);
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void (*get_wpr)(struct gk20a *g, u64 *base, u64 *size);
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int (*alloc_blob_space)(struct gk20a *g,
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size_t size, struct mem_desc *mem);
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int (*pmu_populate_loader_cfg)(struct gk20a *g,
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struct lsfm_managed_ucode_img *lsfm,
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union flcn_bl_generic_desc *p_bl_gen_desc,
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u32 *p_bl_gen_desc_size);
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int (*flcn_populate_bl_dmem_desc)(struct gk20a *g,
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struct lsfm_managed_ucode_img *lsfm,
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union flcn_bl_generic_desc *p_bl_gen_desc,
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u32 *p_bl_gen_desc_size, u32 falconid);
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u32 lspmuwprinitdone;
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u32 lsfloadedfalconid;
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bool fecsbootstrapdone;
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