From ea40ac7e86eb398e390280e5fa25a710fdbbbea8 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Thu, 28 Feb 2019 15:01:09 -0800 Subject: [PATCH] gpu: nvgpu: remove channel cycle stats ioctls Cycle stats and cycle stats snapshot ioctls have been moved to debug node. Removing channel ioctls. Bug 2660206 Bug 220464613 Change-Id: I3aecdf4a8310eeb38de2de5ac076048891afe436 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2030992 (cherry picked from commit f20424ea6a7c6fcf977630e3e95d9e78418f13b8) Signed-off-by: Gagan Grover Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2092020 Reviewed-by: automaticguardword Reviewed-by: Phoenix Jung Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit Tested-by: Peter Daifuku Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/enabled.h | 4 +- drivers/gpu/nvgpu/os/linux/ioctl_channel.c | 69 ---------------------- include/uapi/linux/nvgpu.h | 27 +-------- 3 files changed, 4 insertions(+), 96 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index 77b54ab9d..ef55dad8d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h @@ -92,9 +92,9 @@ struct gk20a; #define NVGPU_HAS_SYNCPOINTS 30 /* sync fence FDs are available in, e.g., submit_gpfifo */ #define NVGPU_SUPPORT_SYNC_FENCE_FDS 31 -/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */ +/* NVGPU_DBG_GPU_IOCTL_CYCLE_STATS is available */ #define NVGPU_SUPPORT_CYCLE_STATS 32 -/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ +/* NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT is available */ #define NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT 33 /* Both gpu driver and device support TSG */ #define NVGPU_SUPPORT_TSG 34 diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c index da35b93f1..0f39cc7a7 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c @@ -276,47 +276,6 @@ int gk20a_channel_free_cycle_stats_snapshot(struct channel_gk20a *ch) return ret; } - -static int gk20a_channel_cycle_stats_snapshot(struct channel_gk20a *ch, - struct nvgpu_cycle_stats_snapshot_args *args) -{ - int ret; - - /* is it allowed to handle calls for current GPU? */ - if (!nvgpu_is_enabled(ch->g, NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT)) - return -ENOSYS; - - if (!args->dmabuf_fd) - return -EINVAL; - - nvgpu_speculation_barrier(); - /* handle the command (most frequent cases first) */ - switch (args->cmd) { - case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_FLUSH: - ret = gk20a_flush_cycle_stats_snapshot(ch); - args->extra = 0; - break; - - case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_ATTACH: - ret = gk20a_attach_cycle_stats_snapshot(ch, - args->dmabuf_fd, - args->extra, - &args->extra); - break; - - case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_DETACH: - ret = gk20a_channel_free_cycle_stats_snapshot(ch); - args->extra = 0; - break; - - default: - pr_err("cyclestats: unknown command %u\n", args->cmd); - ret = -EINVAL; - break; - } - - return ret; -} #endif static int gk20a_channel_set_wdt_status(struct channel_gk20a *ch, @@ -1269,20 +1228,6 @@ long gk20a_channel_ioctl(struct file *filp, (struct nvgpu_set_error_notifier *)buf); gk20a_idle(ch->g); break; -#ifdef CONFIG_GK20A_CYCLE_STATS - case NVGPU_IOCTL_CHANNEL_CYCLE_STATS: - err = gk20a_busy(ch->g); - if (err) { - dev_err(dev, - "%s: failed to host gk20a for ioctl cmd: 0x%x", - __func__, cmd); - break; - } - err = gk20a_channel_cycle_stats(ch, - ((struct nvgpu_cycle_stats_args *)buf)->dmabuf_fd); - gk20a_idle(ch->g); - break; -#endif case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT: { u32 timeout = @@ -1385,20 +1330,6 @@ long gk20a_channel_ioctl(struct file *filp, NVGPU_ERR_NOTIFIER_RESETCHANNEL_VERIF_ERROR, true); gk20a_idle(ch->g); break; -#ifdef CONFIG_GK20A_CYCLE_STATS - case NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT: - err = gk20a_busy(ch->g); - if (err) { - dev_err(dev, - "%s: failed to host gk20a for ioctl cmd: 0x%x", - __func__, cmd); - break; - } - err = gk20a_channel_cycle_stats_snapshot(ch, - (struct nvgpu_cycle_stats_snapshot_args *)buf); - gk20a_idle(ch->g); - break; -#endif case NVGPU_IOCTL_CHANNEL_WDT: err = gk20a_channel_set_wdt_status(ch, (struct nvgpu_channel_wdt_args *)buf); diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 2c130d82e..873e787f1 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -114,9 +114,9 @@ struct nvgpu_gpu_zbc_query_table_args { #define NVGPU_GPU_FLAGS_SUPPORT_SPARSE_ALLOCS (1ULL << 2) /* sync fence FDs are available in, e.g., submit_gpfifo */ #define NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS (1ULL << 3) -/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */ +/* NVGPU_DBG_GPU_IOCTL_CYCLE_STATS is available */ #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1ULL << 4) -/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ +/* NVGPU_DBG_GPU_IOCTL_CYCLE_STATS_SNAPSHOT is available */ #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1ULL << 6) /* User-space managed address spaces support */ #define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1ULL << 7) @@ -1624,11 +1624,6 @@ struct nvgpu_wait_args { } condition; /* determined by type field */ }; -/* cycle stats support */ -struct nvgpu_cycle_stats_args { - __u32 dmabuf_fd; -} __packed; - struct nvgpu_set_timeout_args { __u32 timeout; } __packed; @@ -1677,20 +1672,6 @@ struct nvgpu_notification { #define NVGPU_CHANNEL_SUBMIT_TIMEOUT 1 }; -/* cycle stats snapshot buffer support for mode E */ -struct nvgpu_cycle_stats_snapshot_args { - __u32 cmd; /* in: command to handle */ - __u32 dmabuf_fd; /* in: dma buffer handler */ - __u32 extra; /* in/out: extra payload e.g.*/ - /* counter/start perfmon */ - __u32 pad0[1]; -}; - -/* valid commands to control cycle stats shared buffer */ -#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_FLUSH 0 -#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_ATTACH 1 -#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_DETACH 2 - /* configure watchdog per-channel */ struct nvgpu_channel_wdt_args { __u32 wdt_status; @@ -1789,8 +1770,6 @@ struct nvgpu_reschedule_runlist_args { _IOW(NVGPU_IOCTL_MAGIC, 100, struct nvgpu_alloc_gpfifo_args) #define NVGPU_IOCTL_CHANNEL_WAIT \ _IOWR(NVGPU_IOCTL_MAGIC, 102, struct nvgpu_wait_args) -#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS \ - _IOWR(NVGPU_IOCTL_MAGIC, 106, struct nvgpu_cycle_stats_args) #define NVGPU_IOCTL_CHANNEL_SUBMIT_GPFIFO \ _IOWR(NVGPU_IOCTL_MAGIC, 107, struct nvgpu_submit_gpfifo_args) #define NVGPU_IOCTL_CHANNEL_ALLOC_OBJ_CTX \ @@ -1811,8 +1790,6 @@ struct nvgpu_reschedule_runlist_args { _IO(NVGPU_IOCTL_MAGIC, 116) #define NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL \ _IOWR(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_event_id_ctrl_args) -#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT \ - _IOWR(NVGPU_IOCTL_MAGIC, 118, struct nvgpu_cycle_stats_snapshot_args) #define NVGPU_IOCTL_CHANNEL_WDT \ _IOW(NVGPU_IOCTL_MAGIC, 119, struct nvgpu_channel_wdt_args) #define NVGPU_IOCTL_CHANNEL_SET_RUNLIST_INTERLEAVE \