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gpu: nvgpu: fix MISRA violations in utils unit

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MISRA rule 11.6 states that a cast shall not be performed between
pointer to void and an arithmetic type.  Fix violations of rule 11.6
in utils unit.

Jira NVGPU-3300

Change-Id: I9513baf326be9618bae9bcfed597bfe27a5a2f47
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137305
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2019-06-17 14:44:45 +05:30
committed by mobile promotions
parent 2aaf7f4586
commit eaf1048111
7 changed files with 42 additions and 45 deletions
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22
drivers/gpu/nvgpu/include/nvgpu/posix/utils.h
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@@ -256,28 +256,6 @@ static inline unsigned int nvgpu_posix_hweight64(uint64_t x)
#define MAX_ERRNO 4095
#define IS_ERR_VALUE(x) ((x) >= (unsigned long)-MAX_ERRNO)
static inline void *ERR_PTR(long error)
{
return (void *) error;
}
static inline long PTR_ERR(void *error)
{
return (long)(uintptr_t)error;
}
static inline bool IS_ERR(const void *ptr)
{
return IS_ERR_VALUE((unsigned long)ptr);
}
static inline bool IS_ERR_OR_NULL(const void *ptr)
{
return (ptr == NULL) || IS_ERR_VALUE((unsigned long)ptr);
}
#define ERESTARTSYS ERESTART
#endif /* NVGPU_POSIX_UTILS_H */