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gpu: nvgpu: store bus addr of gpu regs

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Usermode submit needs to access the usermode region of registers from
userspace. Store the start address of register resource in struct
nvgpu_os_linux to be used in remap to userspace.

Bug 200145225
Bug 200541476

Change-Id: I3796b6bf67942af0cc16c86accb82a013032bfc8
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1811838
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 38c11db264
in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/2169921
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Holtta
2018-09-11 14:35:09 +03:00
committed by mobile promotions
parent 58ee7561f7
commit eca2cf043e
4 changed files with 28 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/nvgpu/os/linux/module.c
View File

@@ -680,6 +680,16 @@ void __iomem *nvgpu_devm_ioremap(struct device *dev, resource_size_t offset,
return devm_ioremap(dev, offset, size);
}
u64 nvgpu_resource_addr(struct platform_device *dev, int i)
{
struct resource *r = platform_get_resource(dev, IORESOURCE_MEM, i);
if (!r)
return 0;
return r->start;
}
static irqreturn_t gk20a_intr_isr_stall(int irq, void *dev_id)
{
struct gk20a *g = dev_id;
@@ -764,6 +774,14 @@ static int gk20a_init_support(struct platform_device *pdev)
goto fail;
}
l->regs_bus_addr = nvgpu_resource_addr(pdev,
GK20A_BAR0_IORESOURCE_MEM);
if (!l->regs_bus_addr) {
nvgpu_err(g, "failed to read register bus offset");
err = -ENODEV;
goto fail;
}
l->bar1 = nvgpu_devm_ioremap_resource(pdev,
GK20A_BAR1_IORESOURCE_MEM,
&l->bar1_mem);

1
drivers/gpu/nvgpu/os/linux/module.h
View File

@@ -29,6 +29,7 @@ void __iomem *nvgpu_devm_ioremap_resource(struct platform_device *dev, int i,
struct resource **out);
void __iomem *nvgpu_devm_ioremap(struct device *dev, resource_size_t offset,
resource_size_t size);
u64 nvgpu_resource_addr(struct platform_device *dev, int i);
extern struct class nvgpu_class;
#endif

2
drivers/gpu/nvgpu/os/linux/os_linux.h
View File

@@ -128,6 +128,8 @@ struct nvgpu_os_linux {
void __iomem *usermode_regs;
void __iomem *usermode_regs_saved;
u64 regs_bus_addr;
struct nvgpu_os_linux_ops ops;
#ifdef CONFIG_DEBUG_FS

7
drivers/gpu/nvgpu/os/linux/pci.c
View File

@@ -536,6 +536,13 @@ static int nvgpu_pci_init_support(struct pci_dev *pdev)
goto fail;
}
l->regs_bus_addr = pci_resource_start(pdev, 0);
if (!l->regs_bus_addr) {
nvgpu_err(g, "failed to read register bus offset");
err = -ENODEV;
goto fail;
}
l->bar1 = nvgpu_devm_ioremap(dev, pci_resource_start(pdev, 1),
pci_resource_len(pdev, 1));
if (IS_ERR(l->bar1)) {