gpu: nvgpu: fix ops access for dmem & emem accessors

Similar to imem, update dmem & emem copy_from and copy_to functions to
warn and handle cases where ops are not available.

JIRA NVGPU-1732

Change-Id: If5cebffe68d16933c2abe1cb7e5421877149d823
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1989986
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-01-03 12:38:10 +05:30
committed by mobile promotions
parent 0837b6988c
commit ed8d3b5d8c

View File

@@ -253,6 +253,9 @@ int nvgpu_falcon_copy_from_emem(struct nvgpu_falcon *flcn,
if (flcn_dops->copy_from_emem != NULL) {
status = flcn_dops->copy_from_emem(flcn, src, dst, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
return status;
@@ -272,6 +275,9 @@ int nvgpu_falcon_copy_to_emem(struct nvgpu_falcon *flcn,
if (flcn_dops->copy_to_emem != NULL) {
status = flcn_dops->copy_to_emem(flcn, dst, src, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
return status;
@@ -281,6 +287,7 @@ int nvgpu_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
u32 src, u8 *dst, u32 size, u8 port)
{
struct nvgpu_falcon_ops *flcn_ops;
int status = -EINVAL;
if (flcn == NULL) {
return -EINVAL;
@@ -288,13 +295,21 @@ int nvgpu_falcon_copy_from_dmem(struct nvgpu_falcon *flcn,
flcn_ops = &flcn->flcn_ops;
return flcn_ops->copy_from_dmem(flcn, src, dst, size, port);
if (flcn_ops->copy_from_dmem != NULL) {
status = flcn_ops->copy_from_dmem(flcn, src, dst, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
return status;
}
int nvgpu_falcon_copy_to_dmem(struct nvgpu_falcon *flcn,
u32 dst, u8 *src, u32 size, u8 port)
{
struct nvgpu_falcon_ops *flcn_ops;
int status = -EINVAL;
if (flcn == NULL) {
return -EINVAL;
@@ -302,7 +317,14 @@ int nvgpu_falcon_copy_to_dmem(struct nvgpu_falcon *flcn,
flcn_ops = &flcn->flcn_ops;
return flcn_ops->copy_to_dmem(flcn, dst, src, size, port);
if (flcn_ops->copy_to_dmem != NULL) {
status = flcn_ops->copy_to_dmem(flcn, dst, src, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
return status;
}
int nvgpu_falcon_copy_from_imem(struct nvgpu_falcon *flcn,