diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 2061dcd7c..abf13c392 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -1241,6 +1241,16 @@ int gm20b_init_hal(struct gk20a *g) #endif } +#ifdef CONFIG_NVGPU_COMPRESSION + nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true); + + if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) { + gops->cbc.init = NULL; + gops->cbc.ctrl = NULL; + gops->cbc.alloc_comptags = NULL; + } +#endif + #ifdef CONFIG_NVGPU_GRAPHICS nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false); nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, false); diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 1d0243da6..4a8c3a381 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -1342,6 +1342,16 @@ int gp10b_init_hal(struct gk20a *g) #endif } +#ifdef CONFIG_NVGPU_COMPRESSION + nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true); + + if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) { + gops->cbc.init = NULL; + gops->cbc.ctrl = NULL; + gops->cbc.alloc_comptags = NULL; + } +#endif + #ifdef CONFIG_NVGPU_GRAPHICS nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false); nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true); diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index d813f1d02..8f87f543e 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -1587,6 +1587,16 @@ int gv11b_init_hal(struct gk20a *g) #endif } +#ifdef CONFIG_NVGPU_COMPRESSION + nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true); + + if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) { + gops->cbc.init = NULL; + gops->cbc.ctrl = NULL; + gops->cbc.alloc_comptags = NULL; + } +#endif + nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); #ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 19738d735..056885e7e 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -1780,16 +1780,22 @@ int tu104_init_hal(struct gk20a *g) #ifdef CONFIG_NVGPU_DGPU nvgpu_pramin_ops_init(g); #endif - /* dGpu VDK support */ -#ifdef CONFIG_NVGPU_SIM - if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)){ - /* Disable compression */ + #ifdef CONFIG_NVGPU_COMPRESSION + if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { + nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true); + } + + if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) { gops->cbc.init = NULL; gops->cbc.ctrl = NULL; gops->cbc.alloc_comptags = NULL; + } #endif + /* dGpu VDK support */ +#ifdef CONFIG_NVGPU_SIM + if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { #ifdef CONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT gops->gr.falcon.load_ctxsw_ucode = nvgpu_gr_falcon_load_ctxsw_ucode; diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index b7380baeb..866c98b2e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h @@ -252,10 +252,13 @@ struct gk20a; /** SM RAMS ECC is enabled */ #define NVGPU_ECC_ENABLED_SM_RAMS 86U +/** Enable compression */ +#define NVGPU_SUPPORT_COMPRESSION 87U + /* * Must be greater than the largest bit offset in the above list. */ -#define NVGPU_MAX_ENABLED_BITS 87U +#define NVGPU_MAX_ENABLED_BITS 88U /** * @brief Check if the passed flag is enabled. diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c index 00405753d..c17ff9134 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c @@ -250,7 +250,9 @@ static struct nvgpu_flags_mapping flags_mapping[] = { {NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE}, {NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY, - NVGPU_SUPPORT_FAULT_RECOVERY} + NVGPU_SUPPORT_FAULT_RECOVERY}, + {NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION, + NVGPU_SUPPORT_COMPRESSION} }; static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g) diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 0cbfac844..9f8ca181d 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -173,6 +173,8 @@ struct nvgpu_gpu_zbc_query_table_args { #define NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE (1ULL << 32) /* Fault recovery is enabled */ #define NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY (1ULL << 33) +/* Compression is enabled */ +#define NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION (1ULL << 34) /* SM LRF ECC is enabled */ #define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60) /* SM SHM ECC is enabled */