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gpu: nvgpu: Report non zero num_sub_partition_per_fbpa value only for dGPU

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All Tegra iGPUs don't have real FBPA/FBSP units at all.
So num_sub_partition_per_fbpa should be 0 for iGPUs.

JIRA NVGPU-5656

Change-Id: I30050caf8f9f6b5185404a64dbbbe02f67046093
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2545978
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2021-06-16 16:10:44 +05:30
committed by mobile promotions
parent 9bd91499e3
commit ee2aaef308
1 changed files with 16 additions and 3 deletions
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15
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
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@@ -474,10 +474,23 @@ static long gk20a_ctrl_ioctl_gpu_characteristics(
gpu.lts_per_ltc = nvgpu_ltc_get_slices_per_ltc(g); gpu.lts_per_ltc = nvgpu_ltc_get_slices_per_ltc(g);
gpu.cbc_cache_line_size = nvgpu_ltc_get_cacheline_size(g); gpu.cbc_cache_line_size = nvgpu_ltc_get_cacheline_size(g);
/* All nvgpu supported GPUs have 64 bit FBIO channel /*
* TODO : Need to replace with proper HAL.
*/
if (g->pci_device_id != (u16)0) {
/* All nvgpu supported dGPUs have 64 bit FBIO channel
* So number of Sub partition per FBPA is always 0x2. * So number of Sub partition per FBPA is always 0x2.
* Half FBPA (32BIT channel mode) enablement
* (1 sub partition per FBPA) is disabled for tegra dGPUs.
*/ */
gpu.num_sub_partition_per_fbpa = 0x2; gpu.num_sub_partition_per_fbpa = 0x2;
} else {
/*
* All iGPUs don't have real FBPA/FBSP units at all.
* So num_sub_partition_per_fbpa should be 0 for iGPUs.
*/
gpu.num_sub_partition_per_fbpa = 0x00;
}
if ((g->ops.clk.get_maxrate) && nvgpu_platform_is_silicon(g)) { if ((g->ops.clk.get_maxrate) && nvgpu_platform_is_silicon(g)) {
gpu.max_freq = g->ops.clk.get_maxrate(g, gpu.max_freq = g->ops.clk.get_maxrate(g,