diff --git a/drivers/gpu/nvgpu/common/acr/acr.c b/drivers/gpu/nvgpu/common/acr/acr.c index c86a9978c..d3a58d211 100644 --- a/drivers/gpu/nvgpu/common/acr/acr.c +++ b/drivers/gpu/nvgpu/common/acr/acr.c @@ -152,11 +152,13 @@ int nvgpu_acr_init(struct gk20a *g) #endif #ifdef CONFIG_NVGPU_DGPU case NVGPU_GPUID_TU104: -#if defined(CONFIG_NVGPU_NEXT) - case NVGPU_NEXT_DGPU_GPUID: -#endif nvgpu_tu104_acr_sw_init(g, g->acr); break; +#if defined(CONFIG_NVGPU_NEXT) + case NVGPU_NEXT_DGPU_GPUID: + nvgpu_next_dgpu_acr_sw_init(g, g->acr); + break; +#endif #endif default: nvgpu_kfree(g, g->acr); diff --git a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c index aa9baecc8..5e8faacc9 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c +++ b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c @@ -122,6 +122,9 @@ static void acr_ucode_patch_sig(struct gk20a *g, unsigned int *p_dbg_sig, unsigned int *p_patch_loc, unsigned int *p_patch_ind, u32 sig_size) { +#if defined(CONFIG_NVGPU_NEXT) + struct nvgpu_acr *acr = g->acr; +#endif unsigned int i, j, *p_sig; nvgpu_acr_dbg(g, " "); @@ -133,6 +136,12 @@ static void acr_ucode_patch_sig(struct gk20a *g, nvgpu_info(g, "DEBUG MODE\n"); } +#if defined(CONFIG_NVGPU_NEXT) + if (acr->get_versioned_sig != NULL) { + p_sig = acr->get_versioned_sig(g, acr, p_sig, &sig_size); + } +#endif + /* Patching logic:*/ sig_size = sig_size / 4U; for (i = 0U; i < (sizeof(*p_patch_loc)>>2U); i++) { diff --git a/drivers/gpu/nvgpu/common/acr/acr_priv.h b/drivers/gpu/nvgpu/common/acr/acr_priv.h index 2be717e67..61a1c6d79 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_priv.h +++ b/drivers/gpu/nvgpu/common/acr/acr_priv.h @@ -116,6 +116,7 @@ struct nvgpu_acr { struct gk20a *g; u32 bootstrap_owner; + u32 num_of_sig; /* LSF properties */ u64 lsf_enable_mask; @@ -152,6 +153,8 @@ struct nvgpu_acr { int (*bootstrap_hs_acr)(struct gk20a *g, struct nvgpu_acr *acr); void (*get_wpr_info)(struct gk20a *g, struct wpr_carveout_info *inf); + u32* (*get_versioned_sig)(struct gk20a *g, struct nvgpu_acr *acr, + u32 *sig, u32 *sig_size); }; #endif /* ACR_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/fuse.h b/drivers/gpu/nvgpu/include/nvgpu/gops/fuse.h index 9840c9217..7b068231d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/fuse.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/fuse.h @@ -215,6 +215,9 @@ struct gops_fuse { */ int (*read_per_device_identifier)(struct gk20a *g, u64 *pdi); + int (*read_ucode_version)(struct gk20a *g, u32 falcon_id, + u32 *ucode_version); + #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) #include "include/nvgpu/nvgpu_next_gops_fuse.h" #endif