gpu: nvgpu: Fix MISRA rule 15.6 violations

MISRA Rule-15.6 requires that all if-else blocks and loop blocks
be enclosed in braces, including single statement blocks. Fix errors
due to single statement if-else and loop blocks without braces
by introducing the braces.

JIRA NVGPU-775

Change-Id: Ib70621d39735abae3fd2eb7ccf77f36125e2d7b7
Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1928745
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Srirangan Madhavan
2018-10-17 11:43:03 +05:30
committed by mobile promotions
parent 482d7e7ca2
commit ef5fdac7a6
21 changed files with 122 additions and 63 deletions

View File

@@ -495,8 +495,9 @@ static int nvgpu_init_mm_setup_sw(struct gk20a *g)
}
err = nvgpu_init_mmu_debug(mm);
if (err != 0)
if (err != 0) {
return err;
}
mm->remove_support = nvgpu_remove_mm_support;
mm->remove_ce_support = nvgpu_remove_mm_ce_support;