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gpu: nvgpu: Fix MISRA rule 15.6 violations

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MISRA Rule-15.6 requires that all if-else blocks and loop blocks
be enclosed in braces, including single statement blocks. Fix errors
due to single statement if-else and loop blocks without braces
by introducing the braces.

JIRA NVGPU-775

Change-Id: Ib70621d39735abae3fd2eb7ccf77f36125e2d7b7
Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1928745
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Srirangan Madhavan
2018-10-17 11:43:03 +05:30
committed by mobile promotions
parent 482d7e7ca2
commit ef5fdac7a6
21 changed files with 122 additions and 63 deletions
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6
drivers/gpu/nvgpu/common/semaphore.c
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@@ -591,11 +591,13 @@ bool nvgpu_semaphore_reset(struct nvgpu_semaphore_int *hw_sema)
*/
if (WARN_ON(__nvgpu_semaphore_value_released(threshold + 1U,
current_val)))
current_val))) {
return false;
}
if (current_val == threshold)
if (current_val == threshold) {
return false;
}
nvgpu_mem_wr(hw_sema->ch->g, &hw_sema->location.pool->rw_mem,
hw_sema->location.offset, threshold);