gpu: nvgpu: Reorg pramin HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
pramin sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I0c0aecfb8f5ea436ef353b874f5e36ff24ebd130
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527421
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Sunny He
2017-07-26 17:37:46 -07:00
committed by mobile promotions
parent 9d37d8b78c
commit f0593bb43f
4 changed files with 23 additions and 14 deletions

View File

@@ -25,7 +25,7 @@
#include <nvgpu/hw/gk20a/hw_pram_gk20a.h> #include <nvgpu/hw/gk20a/hw_pram_gk20a.h>
/* WARNING: returns pramin_window_lock taken, complement with pramin_exit() */ /* WARNING: returns pramin_window_lock taken, complement with pramin_exit() */
static u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem, u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
struct page_alloc_chunk *chunk, u32 w) struct page_alloc_chunk *chunk, u32 w)
{ {
u64 bufbase = chunk->base; u64 bufbase = chunk->base;
@@ -56,17 +56,10 @@ static u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
return lo; return lo;
} }
static void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem, void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem,
struct page_alloc_chunk *chunk) struct page_alloc_chunk *chunk)
{ {
gk20a_dbg(gpu_dbg_mem, "end for %p,%p", mem, chunk); gk20a_dbg(gpu_dbg_mem, "end for %p,%p", mem, chunk);
nvgpu_spinlock_release(&g->mm.pramin_window_lock); nvgpu_spinlock_release(&g->mm.pramin_window_lock);
} }
void gk20a_init_pramin_ops(struct gpu_ops *gops)
{
gops->pramin.enter = gk20a_pramin_enter;
gops->pramin.exit = gk20a_pramin_exit;
gops->pramin.data032_r = pram_data032_r;
}

View File

@@ -17,8 +17,12 @@
#ifndef __PRAMIN_GK20A_H__ #ifndef __PRAMIN_GK20A_H__
#define __PRAMIN_GK20A_H__ #define __PRAMIN_GK20A_H__
struct gpu_ops; struct gk20a;
struct nvgpu_mem;
void gk20a_init_pramin_ops(struct gpu_ops *ops); struct page_alloc_chunk;
u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
struct page_alloc_chunk *chunk, u32 w);
void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem,
struct page_alloc_chunk *chunk);
#endif #endif

View File

@@ -70,6 +70,7 @@
#include <nvgpu/hw/gp106/hw_fifo_gp106.h> #include <nvgpu/hw/gp106/hw_fifo_gp106.h>
#include <nvgpu/hw/gp106/hw_ram_gp106.h> #include <nvgpu/hw/gp106/hw_ram_gp106.h>
#include <nvgpu/hw/gp106/hw_top_gp106.h> #include <nvgpu/hw/gp106/hw_top_gp106.h>
#include <nvgpu/hw/gp106/hw_pram_gp106.h>
static int gp106_get_litter_value(struct gk20a *g, int value) static int gp106_get_litter_value(struct gk20a *g, int value)
{ {
@@ -337,6 +338,11 @@ static const struct gpu_ops gp106_ops = {
.max_entries = gk20a_gr_max_entries, .max_entries = gk20a_gr_max_entries,
}, },
#endif /* CONFIG_GK20A_CTXSW_TRACE */ #endif /* CONFIG_GK20A_CTXSW_TRACE */
.pramin = {
.enter = gk20a_pramin_enter,
.exit = gk20a_pramin_exit,
.data032_r = pram_data032_r,
},
.mc = { .mc = {
.intr_enable = mc_gp10b_intr_enable, .intr_enable = mc_gp10b_intr_enable,
.intr_unit_config = mc_gp10b_intr_unit_config, .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -429,6 +435,7 @@ int gp106_init_hal(struct gk20a *g)
gops->fifo = gp106_ops.fifo; gops->fifo = gp106_ops.fifo;
gops->gr_ctx = gp106_ops.gr_ctx; gops->gr_ctx = gp106_ops.gr_ctx;
gops->fecs_trace = gp106_ops.fecs_trace; gops->fecs_trace = gp106_ops.fecs_trace;
gops->pramin = gp106_ops.pramin;
gops->mc = gp106_ops.mc; gops->mc = gp106_ops.mc;
gops->debug = gp106_ops.debug; gops->debug = gp106_ops.debug;
gops->dbg_session_ops = gp106_ops.dbg_session_ops; gops->dbg_session_ops = gp106_ops.dbg_session_ops;
@@ -460,7 +467,6 @@ int gp106_init_hal(struct gk20a *g)
gp106_init_clk_ops(gops); gp106_init_clk_ops(gops);
gp106_init_clk_arb_ops(gops); gp106_init_clk_arb_ops(gops);
gp106_init_regops(gops); gp106_init_regops(gops);
gk20a_init_pramin_ops(gops);
gp106_init_therm_ops(gops); gp106_init_therm_ops(gops);
g->name = "gp10x"; g->name = "gp10x";

View File

@@ -61,6 +61,7 @@
#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h>
#include <nvgpu/hw/gp10b/hw_ram_gp10b.h> #include <nvgpu/hw/gp10b/hw_ram_gp10b.h>
#include <nvgpu/hw/gp10b/hw_top_gp10b.h> #include <nvgpu/hw/gp10b/hw_top_gp10b.h>
#include <nvgpu/hw/gp10b/hw_pram_gp10b.h>
static int gp10b_get_litter_value(struct gk20a *g, int value) static int gp10b_get_litter_value(struct gk20a *g, int value)
{ {
@@ -303,6 +304,11 @@ static const struct gpu_ops gp10b_ops = {
.max_entries = gk20a_gr_max_entries, .max_entries = gk20a_gr_max_entries,
}, },
#endif /* CONFIG_GK20A_CTXSW_TRACE */ #endif /* CONFIG_GK20A_CTXSW_TRACE */
.pramin = {
.enter = gk20a_pramin_enter,
.exit = gk20a_pramin_exit,
.data032_r = pram_data032_r,
},
.mc = { .mc = {
.intr_enable = mc_gp10b_intr_enable, .intr_enable = mc_gp10b_intr_enable,
.intr_unit_config = mc_gp10b_intr_unit_config, .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -378,6 +384,7 @@ int gp10b_init_hal(struct gk20a *g)
gops->fifo = gp10b_ops.fifo; gops->fifo = gp10b_ops.fifo;
gops->gr_ctx = gp10b_ops.gr_ctx; gops->gr_ctx = gp10b_ops.gr_ctx;
gops->fecs_trace = gp10b_ops.fecs_trace; gops->fecs_trace = gp10b_ops.fecs_trace;
gops->pramin = gp10b_ops.pramin;
gops->mc = gp10b_ops.mc; gops->mc = gp10b_ops.mc;
gops->debug = gp10b_ops.debug; gops->debug = gp10b_ops.debug;
gops->dbg_session_ops = gp10b_ops.dbg_session_ops; gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
@@ -442,7 +449,6 @@ int gp10b_init_hal(struct gk20a *g)
gp10b_init_pmu_ops(g); gp10b_init_pmu_ops(g);
gp10b_init_regops(gops); gp10b_init_regops(gops);
gp10b_init_therm_ops(gops); gp10b_init_therm_ops(gops);
gk20a_init_pramin_ops(gops);
g->name = "gp10b"; g->name = "gp10b";