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gpu: nvgpu: Reorg pramin HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the pramin sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I0c0aecfb8f5ea436ef353b874f5e36ff24ebd130 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1527421 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -25,7 +25,7 @@
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#include <nvgpu/hw/gk20a/hw_pram_gk20a.h>
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/* WARNING: returns pramin_window_lock taken, complement with pramin_exit() */
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static u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
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u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
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struct page_alloc_chunk *chunk, u32 w)
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{
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u64 bufbase = chunk->base;
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@@ -56,17 +56,10 @@ static u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
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return lo;
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}
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static void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem,
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void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem,
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struct page_alloc_chunk *chunk)
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{
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gk20a_dbg(gpu_dbg_mem, "end for %p,%p", mem, chunk);
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nvgpu_spinlock_release(&g->mm.pramin_window_lock);
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}
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void gk20a_init_pramin_ops(struct gpu_ops *gops)
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{
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gops->pramin.enter = gk20a_pramin_enter;
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gops->pramin.exit = gk20a_pramin_exit;
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gops->pramin.data032_r = pram_data032_r;
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}
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@@ -17,8 +17,12 @@
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#ifndef __PRAMIN_GK20A_H__
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#define __PRAMIN_GK20A_H__
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struct gpu_ops;
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void gk20a_init_pramin_ops(struct gpu_ops *ops);
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struct gk20a;
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struct nvgpu_mem;
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struct page_alloc_chunk;
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u32 gk20a_pramin_enter(struct gk20a *g, struct nvgpu_mem *mem,
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struct page_alloc_chunk *chunk, u32 w);
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void gk20a_pramin_exit(struct gk20a *g, struct nvgpu_mem *mem,
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struct page_alloc_chunk *chunk);
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#endif
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@@ -70,6 +70,7 @@
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#include <nvgpu/hw/gp106/hw_fifo_gp106.h>
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#include <nvgpu/hw/gp106/hw_ram_gp106.h>
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#include <nvgpu/hw/gp106/hw_top_gp106.h>
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#include <nvgpu/hw/gp106/hw_pram_gp106.h>
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static int gp106_get_litter_value(struct gk20a *g, int value)
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{
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@@ -337,6 +338,11 @@ static const struct gpu_ops gp106_ops = {
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.max_entries = gk20a_gr_max_entries,
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},
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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.pramin = {
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.enter = gk20a_pramin_enter,
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.exit = gk20a_pramin_exit,
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.data032_r = pram_data032_r,
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},
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.mc = {
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.intr_enable = mc_gp10b_intr_enable,
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.intr_unit_config = mc_gp10b_intr_unit_config,
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@@ -429,6 +435,7 @@ int gp106_init_hal(struct gk20a *g)
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gops->fifo = gp106_ops.fifo;
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gops->gr_ctx = gp106_ops.gr_ctx;
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gops->fecs_trace = gp106_ops.fecs_trace;
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gops->pramin = gp106_ops.pramin;
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gops->mc = gp106_ops.mc;
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gops->debug = gp106_ops.debug;
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gops->dbg_session_ops = gp106_ops.dbg_session_ops;
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@@ -460,7 +467,6 @@ int gp106_init_hal(struct gk20a *g)
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gp106_init_clk_ops(gops);
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gp106_init_clk_arb_ops(gops);
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gp106_init_regops(gops);
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gk20a_init_pramin_ops(gops);
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gp106_init_therm_ops(gops);
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g->name = "gp10x";
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@@ -61,6 +61,7 @@
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#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_ram_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_top_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_pram_gp10b.h>
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static int gp10b_get_litter_value(struct gk20a *g, int value)
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{
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@@ -303,6 +304,11 @@ static const struct gpu_ops gp10b_ops = {
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.max_entries = gk20a_gr_max_entries,
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},
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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.pramin = {
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.enter = gk20a_pramin_enter,
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.exit = gk20a_pramin_exit,
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.data032_r = pram_data032_r,
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},
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.mc = {
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.intr_enable = mc_gp10b_intr_enable,
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.intr_unit_config = mc_gp10b_intr_unit_config,
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@@ -378,6 +384,7 @@ int gp10b_init_hal(struct gk20a *g)
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gops->fifo = gp10b_ops.fifo;
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gops->gr_ctx = gp10b_ops.gr_ctx;
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gops->fecs_trace = gp10b_ops.fecs_trace;
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gops->pramin = gp10b_ops.pramin;
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gops->mc = gp10b_ops.mc;
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gops->debug = gp10b_ops.debug;
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gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
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@@ -442,7 +449,6 @@ int gp10b_init_hal(struct gk20a *g)
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gp10b_init_pmu_ops(g);
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gp10b_init_regops(gops);
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gp10b_init_therm_ops(gops);
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gk20a_init_pramin_ops(gops);
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g->name = "gp10b";
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