diff --git a/drivers/gpu/nvgpu/common/boardobj/boardobj.c b/drivers/gpu/nvgpu/common/boardobj/boardobj.c index 78820abcf..0f34acbd9 100644 --- a/drivers/gpu/nvgpu/common/boardobj/boardobj.c +++ b/drivers/gpu/nvgpu/common/boardobj/boardobj.c @@ -23,10 +23,59 @@ #include #include #include -#include -int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, - size_t size, void *args) +/* +* Destructor for the base board object. Called by each device-Specific +* implementation of the BOARDOBJ interface to destroy the board object. +* This has to be explicitly set by each device that extends from the +* board object. +*/ +static int destruct_super(struct boardobj *pboardobj) +{ + struct gk20a *g = pboardobj->g; + + nvgpu_log_info(g, " "); + if (pboardobj == NULL) { + return -EINVAL; + } + + nvgpu_list_del(&pboardobj->node); + if (pboardobj->allocated) { + nvgpu_kfree(pboardobj->g, pboardobj); + } + + return 0; +} + +/* +* check whether the specified BOARDOBJ object implements the queried +* type/class enumeration. +*/ +static bool implements_super(struct gk20a *g, struct boardobj *pboardobj, + u8 type) +{ + nvgpu_log_info(g, " "); + + return (0U != (pboardobj->type_mask & BIT32(type))); +} + +int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g, + struct boardobj *pboardobj, struct nv_pmu_boardobj *pmudata) +{ + nvgpu_log_info(g, " "); + if (pboardobj == NULL) { + return -EINVAL; + } + if (pmudata == NULL) { + return -EINVAL; + } + pmudata->type = pboardobj->type; + nvgpu_log_info(g, " Done"); + return 0; +} + +int nvgpu_boardobj_construct_super(struct gk20a *g, struct boardobj + **ppboardobj, size_t size, void *args) { struct boardobj *pboardobj = NULL; struct boardobj *devtmp = (struct boardobj *)args; @@ -51,51 +100,13 @@ int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, pboardobj->idx = CTRL_BOARDOBJ_IDX_INVALID; pboardobj->type_mask = BIT32(pboardobj->type) | devtmp->type_mask; - pboardobj->implements = boardobj_implements_super; - pboardobj->destruct = boardobj_destruct_super; - pboardobj->pmudatainit = boardobj_pmudatainit_super; + pboardobj->implements = implements_super; + pboardobj->destruct = destruct_super; + pboardobj->pmudatainit = nvgpu_boardobj_pmu_data_init_super; nvgpu_list_add(&pboardobj->node, &g->boardobj_head); return 0; } -int boardobj_destruct_super(struct boardobj *pboardobj) -{ - struct gk20a *g = pboardobj->g; - nvgpu_log_info(g, " "); - if (pboardobj == NULL) { - return -EINVAL; - } - - nvgpu_list_del(&pboardobj->node); - if (pboardobj->allocated) { - nvgpu_kfree(pboardobj->g, pboardobj); - } - - return 0; -} - -bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj, - u8 type) -{ - nvgpu_log_info(g, " "); - - return (0U != (pboardobj->type_mask & BIT(type))); -} - -int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, - struct nv_pmu_boardobj *pmudata) -{ - nvgpu_log_info(g, " "); - if (pboardobj == NULL) { - return -EINVAL; - } - if (pmudata == NULL) { - return -EINVAL; - } - pmudata->type = pboardobj->type; - nvgpu_log_info(g, " Done"); - return 0; -} diff --git a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp.c index 00bdc85eb..a532950dd 100644 --- a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp.c @@ -19,461 +19,14 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ -#include + #include #include #include -#include #include #include #include -/* - * Inserts a previously constructed Board Object into a Board Object Group for - * tracking. Objects are inserted in the array based on the given index. - */ -static int boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, - struct boardobj *pboardobj, u8 index); -/* - * Retrieves a Board Object from a Board Object Group using the group's index. - */ -static struct boardobj *boardobjgrp_objgetbyidx_final( - struct boardobjgrp *pboardobjgrp, u8 index); -/* - * Retrieve Board Object immediately following one pointed by @ref currentindex - * filtered out by the provided mask. If (mask == NULL) => no filtering. - */ -static struct boardobj *boardobjgrp_objgetnext_final( - struct boardobjgrp *pboardobjgrp, - u8 *currentindex, struct boardobjgrpmask *mask); -static int boardobjgrp_objremoveanddestroy_final( - struct boardobjgrp *pboardobjgrp, - u8 index); -static int boardobjgrp_pmudatainstget_stub(struct gk20a *g, - struct nv_pmu_boardobjgrp *boardobjgrppmu, - struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx); -static int boardobjgrp_pmustatusinstget_stub(struct gk20a *g, - void *pboardobjgrppmu, - struct nv_pmu_boardobj_query **ppBoardobjpmustatus, - u8 idx); -static int boardobjgrp_pmucmdsend(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd); -static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd, - bool copy_out); -struct boardobjgrp_pmucmdhandler_params { - /* Pointer to the BOARDOBJGRP associated with this CMD */ - struct boardobjgrp *pboardobjgrp; - /* Pointer to structure representing this NV_PMU_BOARDOBJ_CMD_GRP */ - struct boardobjgrp_pmu_cmd *pcmd; - /* Boolean indicating whether the PMU successfully handled the CMD */ - bool success; -}; - -int boardobjgrp_construct_super(struct gk20a *g, - struct boardobjgrp *pboardobjgrp) -{ - nvgpu_log_info(g, " "); - - if (pboardobjgrp == NULL) { - return -EINVAL; - } - - if (pboardobjgrp->ppobjects == NULL) { - return -EINVAL; - } - - if (pboardobjgrp->mask == NULL) { - return -EINVAL; - } - - pboardobjgrp->g = g; - pboardobjgrp->objmask = 0; - - pboardobjgrp->classid = 0; - pboardobjgrp->pmu.unitid = BOARDOBJGRP_UNIT_ID_INVALID; - pboardobjgrp->pmu.classid = BOARDOBJGRP_GRP_CLASS_ID_INVALID; - pboardobjgrp->pmu.bset = false; - pboardobjgrp->pmu.rpc_func_id = BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID; - pboardobjgrp->pmu.set.id = BOARDOBJGRP_GRP_CMD_ID_INVALID; - pboardobjgrp->pmu.getstatus.id = BOARDOBJGRP_GRP_CMD_ID_INVALID; - - /* Initialize basic interfaces */ - pboardobjgrp->destruct = boardobjgrp_destruct_super; - pboardobjgrp->objinsert = boardobjgrp_objinsert_final; - pboardobjgrp->objgetbyidx = boardobjgrp_objgetbyidx_final; - pboardobjgrp->objgetnext = boardobjgrp_objgetnext_final; - pboardobjgrp->objremoveanddestroy = - boardobjgrp_objremoveanddestroy_final; - - pboardobjgrp->pmuinithandle = boardobjgrp_pmuinithandle_impl; - pboardobjgrp->pmuhdrdatainit = boardobjgrp_pmuhdrdatainit_super; - pboardobjgrp->pmudatainit = boardobjgrp_pmudatainit_super; - pboardobjgrp->pmuset = - g->pmu.fw.ops.boardobj.boardobjgrp_pmuset_impl; - pboardobjgrp->pmugetstatus = - g->pmu.fw.ops.boardobj.boardobjgrp_pmugetstatus_impl; - - pboardobjgrp->pmudatainstget = boardobjgrp_pmudatainstget_stub; - pboardobjgrp->pmustatusinstget = boardobjgrp_pmustatusinstget_stub; - - pboardobjgrp->objmaxidx = CTRL_BOARDOBJ_IDX_INVALID; - pboardobjgrp->bconstructed = true; - - nvgpu_list_add(&pboardobjgrp->node, &g->boardobjgrp_head); - - return 0; -} - -int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) -{ - struct gk20a *g = pboardobjgrp->g; - - nvgpu_log_info(g, " "); - - if (pboardobjgrp == NULL) { - return -EINVAL; - } - - if (!pboardobjgrp->bconstructed) { - return 0; - } - - return pboardobjgrp->destruct(pboardobjgrp); -} - -int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) -{ - struct boardobj *pboardobj; - struct gk20a *g = pboardobjgrp->g; - int status = 0; - int stat; - u8 index; - - nvgpu_log_info(g, " "); - - if (pboardobjgrp->mask == NULL) { - return -EINVAL; - } - if (pboardobjgrp->ppobjects == NULL) { - return -EINVAL; - } - - BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) { - stat = pboardobjgrp->objremoveanddestroy(pboardobjgrp, index); - if (status == 0) { - status = stat; - } - - pboardobjgrp->ppobjects[index] = NULL; - pboardobjgrp->objmask &= ~BIT32(index); - } - - pboardobjgrp->objmask = 0; - - if (pboardobjgrp->objmaxidx != CTRL_BOARDOBJ_IDX_INVALID) { - if (status == 0) { - status = -EINVAL; - } - - WARN_ON(true); - } - - /* Destroy the PMU CMD data */ - stat = boardobjgrp_pmucmd_destroy_impl(g, &pboardobjgrp->pmu.set); - if (status == 0) { - status = stat; - } - - stat = boardobjgrp_pmucmd_destroy_impl(g, &pboardobjgrp->pmu.getstatus); - if (status == 0) { - status = stat; - } - - nvgpu_list_del(&pboardobjgrp->node); - - pboardobjgrp->bconstructed = false; - - return status; -} - -int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp - *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) -{ - nvgpu_log_info(g, " "); - - /* Copy the parameters into the CMD*/ - cmd->id = id; - cmd->msgid = msgid; - cmd->hdrsize = (u8) hdrsize; - cmd->entrysize = (u8) entrysize; - cmd->fbsize = fbsize; - - return 0; -} - -int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp - *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) -{ - nvgpu_log_fn(g, " "); - - /* Copy the parameters into the CMD*/ - cmd->dmem_buffer_size = ((hdrsize > entrysize) ? hdrsize : entrysize); - cmd->super_surface_offset = ss_offset; - pboardobjgrp->pmu.rpc_func_id = rpc_func_id; - cmd->fbsize = fbsize; - - nvgpu_log_fn(g, "DONE"); - return 0; -} - -int boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, - struct boardobjgrp_pmu_cmd *cmd) -{ - struct nvgpu_mem *mem = &cmd->surf.sysmem_desc; - - nvgpu_pmu_surface_free(g, mem); - return 0; -} - -int is_boardobjgrp_pmucmd_id_valid_v0(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd) -{ - int err = 0; - - if (pcmd->id == BOARDOBJGRP_GRP_CMD_ID_INVALID) { - err = -EINVAL; - } - - return err; -} - -int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *cmd) -{ - int err = 0; - - if (pboardobjgrp->pmu.rpc_func_id == - BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID) { - err = -EINVAL; - } - - return err; -} - -int boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd) -{ - int status = 0; - struct nvgpu_mem *sysmem_desc = &pcmd->surf.sysmem_desc; - - nvgpu_log_info(g, " "); - - if (g->pmu.fw.ops.boardobj.is_boardobjgrp_pmucmd_id_valid(g, - pboardobjgrp, pcmd) != 0) { - goto boardobjgrp_pmucmd_pmuinithandle_exit; - } - - if (pcmd->fbsize == 0U) { - goto boardobjgrp_pmucmd_pmuinithandle_exit; - } - - nvgpu_pmu_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize); - /* we only have got sysmem later this will get copied to vidmem - surface*/ - pcmd->surf.vidmem_desc.size = 0; - - pcmd->buf = (struct nv_pmu_boardobjgrp_super *)sysmem_desc->cpu_va; - -boardobjgrp_pmucmd_pmuinithandle_exit: - return status; -} - -int boardobjgrp_pmuinithandle_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp) -{ - int status = 0; - - nvgpu_log_info(g, " "); - - status = boardobjgrp_pmucmd_pmuinithandle_impl(g, pboardobjgrp, - &pboardobjgrp->pmu.set); - if (status != 0) { - nvgpu_err(g, "failed to init pmu set cmd"); - goto boardobjgrp_pmuinithandle_exit; - } - - status = boardobjgrp_pmucmd_pmuinithandle_impl(g, pboardobjgrp, - &pboardobjgrp->pmu.getstatus); - if (status != 0) { - nvgpu_err(g, "failed to init get status command"); - goto boardobjgrp_pmuinithandle_exit; - } - - /* If the GRP_SET CMD has not been allocated, nothing left to do. */ - if ((g->pmu.fw.ops.boardobj.is_boardobjgrp_pmucmd_id_valid(g, - pboardobjgrp, &pboardobjgrp->pmu.set) != 0)|| - (BOARDOBJGRP_IS_EMPTY(pboardobjgrp))) { - goto boardobjgrp_pmuinithandle_exit; - } - - /* Send the BOARDOBJGRP to the pmu via RM_PMU_BOARDOBJ_CMD_GRP. */ - status = pboardobjgrp->pmuset(g, pboardobjgrp); - if (status != 0) { - nvgpu_err(g, "failed to send boardobg grp to PMU"); - } - -boardobjgrp_pmuinithandle_exit: - return status; -} - - -int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp - *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, - struct boardobjgrpmask *mask) -{ - nvgpu_log_info(g, " "); - - if (pboardobjgrp == NULL) { - return -EINVAL; - } - if (pboardobjgrppmu == NULL) { - return -EINVAL; - } - pboardobjgrppmu->type = pboardobjgrp->type; - pboardobjgrppmu->class_id = pboardobjgrp->classid; - pboardobjgrppmu->obj_slots = BOARDOBJGRP_PMU_SLOTS_GET(pboardobjgrp); - pboardobjgrppmu->flags = 0; - - nvgpu_log_info(g, " Done"); - return 0; -} - -static int boardobjgrp_pmudatainstget_stub(struct gk20a *g, - struct nv_pmu_boardobjgrp *boardobjgrppmu, - struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) -{ - nvgpu_log_info(g, " "); - return -EINVAL; -} - - -static int boardobjgrp_pmustatusinstget_stub(struct gk20a *g, - void *pboardobjgrppmu, - struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx) -{ - nvgpu_log_info(g, " "); - return -EINVAL; -} - -int boardobjgrp_pmudatainit_legacy(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) -{ - int status = 0; - struct boardobj *pboardobj = NULL; - struct nv_pmu_boardobj *ppmudata = NULL; - u8 index; - - nvgpu_log_info(g, " "); - - if (pboardobjgrp == NULL) { - return -EINVAL; - } - if (pboardobjgrppmu == NULL) { - return -EINVAL; - } - - boardobjgrpe32hdrset((struct nv_pmu_boardobjgrp *)pboardobjgrppmu, - pboardobjgrp->objmask); - - BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, index, pboardobjgrp->objmask) { - /* Obtain pointer to the current instance of the Object from the Group */ - pboardobj = pboardobjgrp->objgetbyidx(pboardobjgrp, index); - if (NULL == pboardobj) { - nvgpu_err(g, "could not get object instance"); - status = -EINVAL; - goto boardobjgrppmudatainit_legacy_done; - } - - status = pboardobjgrp->pmudatainstget(g, - (struct nv_pmu_boardobjgrp *)pboardobjgrppmu, - &ppmudata, index); - if (status != 0) { - nvgpu_err(g, "could not get object instance"); - goto boardobjgrppmudatainit_legacy_done; - } - - /* Initialize the PMU Data */ - status = pboardobj->pmudatainit(g, pboardobj, ppmudata); - if (status != 0) { - nvgpu_err(g, - "could not parse pmu for device %d", index); - goto boardobjgrppmudatainit_legacy_done; - } - } - BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK_END - -boardobjgrppmudatainit_legacy_done: - nvgpu_log_info(g, " Done"); - return status; -} - -int boardobjgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp - *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) -{ - int status = 0; - struct boardobj *pboardobj = NULL; - struct nv_pmu_boardobj *ppmudata = NULL; - u8 index; - - nvgpu_log_info(g, " "); - - if (pboardobjgrp == NULL) { - return -EINVAL; - } - if (pboardobjgrppmu == NULL) { - return -EINVAL; - } - - /* Initialize the PMU HDR data.*/ - status = pboardobjgrp->pmuhdrdatainit(g, pboardobjgrp, pboardobjgrppmu, - pboardobjgrp->mask); - if (status != 0) { - nvgpu_err(g, "unable to init boardobjgrp pmuhdr data"); - goto boardobjgrppmudatainit_super_done; - } - - BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) { - status = pboardobjgrp->pmudatainstget(g, - (struct nv_pmu_boardobjgrp *)pboardobjgrppmu, - &ppmudata, index); - if (status != 0) { - nvgpu_err(g, "could not get object instance"); - goto boardobjgrppmudatainit_super_done; - } - - /* Initialize the PMU Data and send to PMU */ - status = pboardobj->pmudatainit(g, pboardobj, ppmudata); - if (status != 0) { - nvgpu_err(g, - "could not parse pmu for device %d", index); - goto boardobjgrppmudatainit_super_done; - } - } - -boardobjgrppmudatainit_super_done: - nvgpu_log_info(g, " Done"); - return status; -} - static int check_boardobjgrp_param(struct gk20a *g, struct boardobjgrp *pboardobjgrp) { @@ -501,266 +54,12 @@ static int check_boardobjgrp_param(struct gk20a *g, return 0; } -int boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) -{ - int status = 0; - struct boardobjgrp_pmu_cmd *pcmd = - (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); - - nvgpu_log_info(g, " "); - - if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { - return -EINVAL; - } - - if (pboardobjgrp->pmu.set.id == BOARDOBJGRP_GRP_CMD_ID_INVALID) { - return -EINVAL; - } - - if ((pcmd->hdrsize == 0U) || - (pcmd->entrysize == 0U) || - (pcmd->buf == NULL)) { - return -EINVAL; - } - - /* Initialize PMU buffer with BOARDOBJGRP data. */ - (void) memset(pcmd->buf, 0x0, pcmd->fbsize); - status = pboardobjgrp->pmudatainit(g, pboardobjgrp, - pcmd->buf); - if (status != 0) { - nvgpu_err(g, "could not parse pmu data"); - goto boardobjgrp_pmuset_exit; - } - - /* - * Reset the boolean that indicates set status for most recent - * instance of BOARDOBJGRP. - */ - pboardobjgrp->pmu.bset = false; - - /* - * alloc mem in vidmem & copy constructed pmu boardobjgrp data from - * sysmem to vidmem - */ - if (pcmd->surf.vidmem_desc.size == 0U) { - nvgpu_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, - pcmd->fbsize); - } - nvgpu_mem_wr_n(g, &pcmd->surf.vidmem_desc, 0, pcmd->buf, pcmd->fbsize); - - /* Send the SET PMU CMD to the PMU */ - status = boardobjgrp_pmucmdsend(g, pboardobjgrp, - pcmd); - if (status != 0) { - nvgpu_err(g, "could not send SET CMD to PMU"); - goto boardobjgrp_pmuset_exit; - } - - pboardobjgrp->pmu.bset = true; - -boardobjgrp_pmuset_exit: - return status; -} - -int boardobjgrp_pmuset_impl_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp) -{ - struct nvgpu_pmu *pmu = &g->pmu; - int status = 0; - struct boardobjgrp_pmu_cmd *pcmd = - (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); - - nvgpu_log_info(g, " "); - - if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { - return -EINVAL; - } - - if ((pcmd->buf == NULL) && - (pboardobjgrp->pmu.rpc_func_id == - BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID)) { - return -EINVAL; - } - - /* Initialize PMU buffer with BOARDOBJGRP data. */ - (void) memset(pcmd->buf, 0x0, pcmd->fbsize); - status = pboardobjgrp->pmudatainit(g, pboardobjgrp, - pcmd->buf); - if (status != 0) { - nvgpu_err(g, "could not parse pmu data"); - goto boardobjgrp_pmuset_exit; - } - - /* - * Reset the boolean that indicates set status - * for most recent instance of BOARDOBJGRP. - */ - pboardobjgrp->pmu.bset = false; - - /* - * copy constructed pmu boardobjgrp data from - * sysmem to pmu super surface present in FB - */ - nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g, - pmu, pmu->super_surface), - pcmd->super_surface_offset, pcmd->buf, - pcmd->fbsize); - - /* Send the SET PMU CMD to the PMU using RPC*/ - status = boardobjgrp_pmucmdsend_rpc(g, pboardobjgrp, - pcmd, false); - if (status != 0) { - nvgpu_err(g, "could not send SET CMD to PMU"); - goto boardobjgrp_pmuset_exit; - } - - pboardobjgrp->pmu.bset = true; - -boardobjgrp_pmuset_exit: - return status; -} - -int -boardobjgrp_pmugetstatus_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, - struct boardobjgrpmask *mask) -{ - int status = 0; - struct boardobjgrp_pmu_cmd *pcmd = - (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); - struct boardobjgrp_pmu_cmd *pset = - (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); - - nvgpu_log_info(g, " "); - - if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { - return -EINVAL; - } - - if (pset->id == BOARDOBJGRP_GRP_CMD_ID_INVALID) { - return -EINVAL; - } - - if ((pcmd->hdrsize == 0U) || - (pcmd->entrysize == 0U) || - (pcmd->buf == NULL)) { - return -EINVAL; - } - - /* - * Can only GET_STATUS if the BOARDOBJGRP has been previously SET to the - * PMU - */ - if (!pboardobjgrp->pmu.bset) { - return -EINVAL; - } - - /* - * alloc mem in vidmem & copy constructed pmu boardobjgrp data from - * sysmem to vidmem - */ - if (pcmd->surf.vidmem_desc.size == 0U) { - nvgpu_pmu_vidmem_surface_alloc(g, &pcmd->surf.vidmem_desc, - pcmd->fbsize); - } - - /* - * Initialize PMU buffer with the mask of BOARDOBJGRPs for which to - * retrieve status - */ - - (void) memset(pcmd->buf, 0x0, pcmd->fbsize); - status = pboardobjgrp->pmuhdrdatainit(g, pboardobjgrp, - pcmd->buf, mask); - if (status != 0) { - nvgpu_err(g, "could not init PMU HDR data"); - goto boardobjgrp_pmugetstatus_exit; - } - - nvgpu_mem_wr_n(g, &pcmd->surf.vidmem_desc, 0, pset->buf, pset->hdrsize); - /* Send the GET_STATUS PMU CMD to the PMU */ - status = boardobjgrp_pmucmdsend(g, pboardobjgrp, - &pboardobjgrp->pmu.getstatus); - if (status != 0) { - nvgpu_err(g, "could not send GET_STATUS cmd to PMU"); - goto boardobjgrp_pmugetstatus_exit; - } - - /*copy the data back to sysmem buffer that belongs to command*/ - nvgpu_mem_rd_n(g, &pcmd->surf.vidmem_desc, 0, pcmd->buf, pcmd->fbsize); - -boardobjgrp_pmugetstatus_exit: - return status; -} - -int -boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, - struct boardobjgrpmask *mask) -{ - struct nvgpu_pmu *pmu = &g->pmu; - int status = 0; - struct boardobjgrp_pmu_cmd *pcmd = - (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); - - nvgpu_log_info(g, " "); - - if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { - return -EINVAL; - } - - if ((pcmd->buf == NULL) && - (pboardobjgrp->pmu.rpc_func_id == - BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID)) { - return -EINVAL; - } - - /* - * Can only GET_STATUS if the BOARDOBJGRP has been - * previously SET to the PMU - */ - if (!pboardobjgrp->pmu.bset) { - return -EINVAL; - } - - /* - * Initialize PMU buffer with the mask of - * BOARDOBJGRPs for which to retrieve status - */ - (void) memset(pcmd->buf, 0x0, pcmd->fbsize); - status = pboardobjgrp->pmuhdrdatainit(g, pboardobjgrp, - pcmd->buf, mask); - if (status != 0) { - nvgpu_err(g, "could not init PMU HDR data"); - goto boardobjgrp_pmugetstatus_exit; - } - - /* - * copy constructed pmu boardobjgrp data from - * sysmem to pmu super surface present in FB - */ - nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g, - pmu, pmu->super_surface), - pcmd->super_surface_offset, - pcmd->buf, pcmd->fbsize); - /* Send the GET_STATUS PMU CMD to the PMU */ - status = boardobjgrp_pmucmdsend_rpc(g, pboardobjgrp, - pcmd, true); - if (status != 0) { - nvgpu_err(g, "could not send GET_STATUS cmd to PMU"); - goto boardobjgrp_pmugetstatus_exit; - } - - /*copy the data back to sysmem buffer that belongs to command*/ - nvgpu_mem_rd_n(g, nvgpu_pmu_super_surface_mem(g, - pmu, pmu->super_surface), - pcmd->super_surface_offset, - pcmd->buf, pcmd->fbsize); - -boardobjgrp_pmugetstatus_exit: - return status; -} - +/* + * Inserts a previously constructed Board Object into a Board Object Group for + * tracking. Objects are inserted in the array based on the given index. + */ static int -boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, +obj_insert_final(struct boardobjgrp *pboardobjgrp, struct boardobj *pboardobj, u8 index) { struct gk20a *g = pboardobjgrp->g; @@ -800,10 +99,13 @@ boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, nvgpu_log_info(g, " Done"); - return boardobjgrpmask_bitset(pboardobjgrp->mask, index); + return nvgpu_boardobjgrpmask_bit_set(pboardobjgrp->mask, index); } -static struct boardobj *boardobjgrp_objgetbyidx_final( +/* + * Retrieves a Board Object from a Board Object Group using the group's index. + */ +static struct boardobj *obj_get_by_idx_final( struct boardobjgrp *pboardobjgrp, u8 index) { if (!boardobjgrp_idxisvalid(pboardobjgrp, index)) { @@ -812,7 +114,11 @@ static struct boardobj *boardobjgrp_objgetbyidx_final( return pboardobjgrp->ppobjects[index]; } -static struct boardobj *boardobjgrp_objgetnext_final( +/* + * Retrieve Board Object immediately following one pointed by @ref currentindex + * filtered out by the provided mask. If (mask == NULL) => no filtering. + */ +static struct boardobj *obj_get_next_final( struct boardobjgrp *pboardobjgrp, u8 *currentindex, struct boardobjgrpmask *mask) { @@ -838,7 +144,7 @@ static struct boardobj *boardobjgrp_objgetnext_final( /* Validate provided mask */ if (mask != NULL) { - if (!(boardobjgrpmask_sizeeq(pboardobjgrp->mask, mask))) { + if (!(nvgpu_boardobjgrpmask_sizeeq(pboardobjgrp->mask, mask))) { return NULL; } } @@ -851,7 +157,7 @@ static struct boardobj *boardobjgrp_objgetnext_final( if (pboardobjnext != NULL) { /* Filter results using client provided mask.*/ if (mask != NULL) { - if (!boardobjgrpmask_bitget(mask, + if (!nvgpu_boardobjgrpmask_bit_get(mask, index)) { pboardobjnext = NULL; continue; @@ -866,7 +172,24 @@ static struct boardobj *boardobjgrp_objgetnext_final( return pboardobjnext; } -static int boardobjgrp_objremoveanddestroy_final( +static int pmu_data_inst_get_stub(struct gk20a *g, + struct nv_pmu_boardobjgrp *boardobjgrppmu, + struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) +{ + nvgpu_log_info(g, " "); + return -EINVAL; +} + + +static int pmu_status_inst_get_stub(struct gk20a *g, + void *pboardobjgrppmu, + struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx) +{ + nvgpu_log_info(g, " "); + return -EINVAL; +} + +static int obj_remove_and_destroy_final( struct boardobjgrp *pboardobjgrp, u8 index) { @@ -891,7 +214,7 @@ static int boardobjgrp_objremoveanddestroy_final( pboardobjgrp->objmask &= ~BIT32(index); - stat = boardobjgrpmask_bitclr(pboardobjgrp->mask, index); + stat = nvgpu_boardobjgrpmask_bit_clr(pboardobjgrp->mask, index); if (stat != 0) { if (status == 0) { status = stat; @@ -901,147 +224,166 @@ static int boardobjgrp_objremoveanddestroy_final( /* objmaxidx requires update only if that very object was removed */ if (pboardobjgrp->objmaxidx == index) { pboardobjgrp->objmaxidx = - boardobjgrpmask_bitidxhighest(pboardobjgrp->mask); + nvgpu_boardobjgrpmask_bit_idx_highest( + pboardobjgrp->mask); } return status; } -void boardobjgrpe32hdrset(struct nv_pmu_boardobjgrp *hdr, u32 objmask) +static int pmu_cmd_destroy_impl(struct gk20a *g, + struct boardobjgrp_pmu_cmd *cmd) { - u32 slots = objmask; + struct nvgpu_mem *mem = &cmd->surf.sysmem_desc; - HIGHESTBITIDX_32(slots); - slots++; - - hdr->super.type = CTRL_BOARDOBJGRP_TYPE_E32; - hdr->super.class_id = 0; - hdr->super.obj_slots = (u8)slots; - hdr->obj_mask = objmask; + nvgpu_pmu_surface_free(g, mem); + return 0; } -static void boardobjgrp_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, - void *param, u32 status) +static int destruct_super(struct boardobjgrp *pboardobjgrp) { - struct nv_pmu_boardobj_msg_grp *pgrpmsg; - struct boardobjgrp_pmucmdhandler_params *phandlerparams = - (struct boardobjgrp_pmucmdhandler_params *)param; - struct boardobjgrp *pboardobjgrp = phandlerparams->pboardobjgrp; - struct boardobjgrp_pmu_cmd *pgrpcmd = phandlerparams->pcmd; - - nvgpu_log_info(g, " "); - - pgrpmsg = &msg->msg.boardobj.grp; - - if (pgrpmsg->class_id != pboardobjgrp->pmu.classid) { - nvgpu_err(g, - "Unrecognized GRP type: unit %x class id=0x%02x cmd id %x", - msg->hdr.unit_id, pboardobjgrp->pmu.classid, - pgrpcmd->id); - return; - } - - if (msg->msg.boardobj.msg_type != pgrpcmd->msgid) { - nvgpu_err(g, - "unsupported msg for unit %x class %x cmd id %x msg %x", - msg->hdr.unit_id, pboardobjgrp->pmu.classid, - pgrpcmd->id, msg->msg.boardobj.msg_type); - return; - } - - if (msg->msg.boardobj.grp_set.flcn_status != 0U) { - nvgpu_err(g, - "cmd abort for unit %x class %x cmd id %x status %x", - msg->hdr.unit_id, pboardobjgrp->pmu.classid, - pgrpcmd->id, - msg->msg.boardobj.grp_set.flcn_status); - return; - } - - phandlerparams->success = pgrpmsg->b_success; - - if (!pgrpmsg->b_success) { - nvgpu_err(g, - "failed GRPCMD: msgtype=0x%x, classid=0x%x, cmd id %x", - pgrpmsg->msg_type, pgrpmsg->class_id, - pgrpcmd->id); - return; - } -} - -static int boardobjgrp_pmucmdsend(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd) -{ - struct boardobjgrp_pmucmdhandler_params handlerparams; - struct pmu_payload payload; - struct nv_pmu_boardobj_cmd_grp *pgrpcmd; - struct pmu_cmd cmd; + struct boardobj *pboardobj; + struct gk20a *g = pboardobjgrp->g; int status = 0; - size_t tmp_size; + int stat; + u8 index; nvgpu_log_info(g, " "); - (void) memset(&payload, 0, sizeof(payload)); - (void) memset(&handlerparams, 0, sizeof(handlerparams)); - (void) memset(&cmd, 0, sizeof(struct pmu_cmd)); - cmd.hdr.unit_id = pboardobjgrp->pmu.unitid; - tmp_size = sizeof(struct nv_pmu_boardobj_cmd_grp) + - sizeof(struct pmu_hdr); - nvgpu_assert(tmp_size <= (size_t)U8_MAX); - cmd.hdr.size = U8(tmp_size); - - pgrpcmd = &cmd.cmd.boardobj.grp; - pgrpcmd->cmd_type = pcmd->id; - pgrpcmd->class_id = pboardobjgrp->pmu.classid; - pgrpcmd->grp.hdr_size = pcmd->hdrsize; - pgrpcmd->grp.entry_size = pcmd->entrysize; - - /* - * copy vidmem information to boardobj_cmd_grp - */ - nvgpu_pmu_surface_describe(g, &pcmd->surf.vidmem_desc, - &pgrpcmd->grp.fb); - - /* - * PMU reads command from sysmem so assigned - * "payload.in.buf = pcmd->buf" - * but PMU access pmu boardobjgrp data from vidmem copied above - */ - payload.in.buf = pcmd->buf; - payload.in.size = U32(max(pcmd->hdrsize, pcmd->entrysize)); - payload.in.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; - payload.in.offset = U32(offsetof(struct nv_pmu_boardobj_cmd_grp, grp)); - - /* Setup the handler params to communicate back results.*/ - handlerparams.pboardobjgrp = pboardobjgrp; - handlerparams.pcmd = pcmd; - handlerparams.success = false; - - status = nvgpu_pmu_cmd_post(g, &cmd, &payload, - PMU_COMMAND_QUEUE_LPQ, - boardobjgrp_pmucmdhandler, - (void *)&handlerparams); - if (status != 0) { - nvgpu_err(g, - "unable to post boardobj grp cmd for unit %x cmd id %x", - cmd.hdr.unit_id, pcmd->id); - goto boardobjgrp_pmucmdsend_exit; + if (pboardobjgrp->mask == NULL) { + return -EINVAL; } - pmu_wait_message_cond(&g->pmu, - nvgpu_get_poll_timeout(g), - &handlerparams.success, 1); - if (!handlerparams.success) { - nvgpu_err(g, "could not process cmd"); - status = -ETIMEDOUT; - goto boardobjgrp_pmucmdsend_exit; + if (pboardobjgrp->ppobjects == NULL) { + return -EINVAL; } -boardobjgrp_pmucmdsend_exit: + BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) { + stat = pboardobjgrp->objremoveanddestroy(pboardobjgrp, index); + if (status == 0) { + status = stat; + } + + pboardobjgrp->ppobjects[index] = NULL; + pboardobjgrp->objmask &= ~BIT32(index); + } + + pboardobjgrp->objmask = 0; + + if (pboardobjgrp->objmaxidx != CTRL_BOARDOBJ_IDX_INVALID) { + if (status == 0) { + status = -EINVAL; + } + + WARN_ON(true); + } + + /* Destroy the PMU CMD data */ + stat = pmu_cmd_destroy_impl(g, &pboardobjgrp->pmu.set); + if (status == 0) { + status = stat; + } + + stat = pmu_cmd_destroy_impl(g, &pboardobjgrp->pmu.getstatus); + if (status == 0) { + status = stat; + } + + nvgpu_list_del(&pboardobjgrp->node); + + pboardobjgrp->bconstructed = false; + return status; } -static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, +static int is_pmu_cmd_id_valid(struct gk20a *g, + struct boardobjgrp *pboardobjgrp, + struct boardobjgrp_pmu_cmd *cmd) +{ + int err = 0; + + if (pboardobjgrp->pmu.rpc_func_id == + BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID) { + err = -EINVAL; + } + + return err; +} + +static int pmu_cmd_pmu_init_handle_impl(struct gk20a *g, + struct boardobjgrp *pboardobjgrp, + struct boardobjgrp_pmu_cmd *pcmd) +{ + int status = 0; + struct nvgpu_mem *sysmem_desc = &pcmd->surf.sysmem_desc; + + nvgpu_log_info(g, " "); + + + if (is_pmu_cmd_id_valid(g, + pboardobjgrp, pcmd) != 0) { + goto pmu_cmd_pmu_init_handle_impl_exit; + } + + if (pcmd->fbsize == 0U) { + goto pmu_cmd_pmu_init_handle_impl_exit; + } + + status = nvgpu_pmu_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize); + if (status != 0) { + nvgpu_err(g, "failed to allocate memory\n"); + return -ENOMEM; + } + + /* we only have got sysmem later this will get copied to vidmem + surface*/ + pcmd->surf.vidmem_desc.size = 0; + + pcmd->buf = (struct nv_pmu_boardobjgrp_super *)sysmem_desc->cpu_va; + + pmu_cmd_pmu_init_handle_impl_exit: + return status; +} + +static int pmu_init_handle_impl(struct gk20a *g, + struct boardobjgrp *pboardobjgrp) +{ + int status = 0; + + nvgpu_log_info(g, " "); + + status = pmu_cmd_pmu_init_handle_impl(g, pboardobjgrp, + &pboardobjgrp->pmu.set); + if (status != 0) { + nvgpu_err(g, "failed to init pmu set cmd"); + goto pmu_init_handle_impl_exit; + } + + status = pmu_cmd_pmu_init_handle_impl(g, pboardobjgrp, + &pboardobjgrp->pmu.getstatus); + if (status != 0) { + nvgpu_err(g, "failed to init get status command"); + goto pmu_init_handle_impl_exit; + } + + /* If the GRP_SET CMD has not been allocated, nothing left to do. */ + + if ((is_pmu_cmd_id_valid(g, + pboardobjgrp, &pboardobjgrp->pmu.set) != 0)|| + (BOARDOBJGRP_IS_EMPTY(pboardobjgrp))) { + goto pmu_init_handle_impl_exit; + } + + /* Send the BOARDOBJGRP to the pmu via RM_PMU_BOARDOBJ_CMD_GRP. */ + status = pboardobjgrp->pmuset(g, pboardobjgrp); + if (status != 0) { + nvgpu_err(g, "failed to send boardobg grp to PMU"); + } + + pmu_init_handle_impl_exit: + return status; +} + +static int pmu_cmd_send_rpc(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *pcmd, bool copy_out) @@ -1075,3 +417,346 @@ static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, return status; } + +/* +* Sends a BOARDOBJGRP to the PMU via the PMU_BOARDOBJ_CMD_GRP interface. +* This interface leverages @ref boardobjgrp_pmudatainit to populate the +* structure. +*/ +static int pmu_set_impl(struct gk20a *g, + struct boardobjgrp *pboardobjgrp) +{ + struct nvgpu_pmu *pmu = &g->pmu; + int status = 0; + struct boardobjgrp_pmu_cmd *pcmd = + (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); + + nvgpu_log_info(g, " "); + + if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { + return -EINVAL; + } + + if ((pcmd->buf == NULL) && + (pboardobjgrp->pmu.rpc_func_id == + BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID)) { + return -EINVAL; + } + + /* Initialize PMU buffer with BOARDOBJGRP data. */ + (void) memset(pcmd->buf, 0x0, pcmd->fbsize); + status = pboardobjgrp->pmudatainit(g, pboardobjgrp, + pcmd->buf); + if (status != 0) { + nvgpu_err(g, "could not parse pmu data"); + goto pmu_set_impl_exit; + } + + /* + * Reset the boolean that indicates set status + * for most recent instance of BOARDOBJGRP. + */ + pboardobjgrp->pmu.bset = false; + + /* + * copy constructed pmu boardobjgrp data from + * sysmem to pmu super surface present in FB + */ + nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g, + pmu, pmu->super_surface), + pcmd->super_surface_offset, pcmd->buf, + pcmd->fbsize); + + /* Send the SET PMU CMD to the PMU using RPC*/ + status = pmu_cmd_send_rpc(g, pboardobjgrp, + pcmd, false); + if (status != 0) { + nvgpu_err(g, "could not send SET CMD to PMU"); + goto pmu_set_impl_exit; + } + + pboardobjgrp->pmu.bset = true; + + pmu_set_impl_exit: + return status; +} + +/* +* Gets the dynamic status of the PMU BOARDOBJGRP via the +* PMU_BOARDOBJ_CMD_GRP GET_STATUS interface. +*/ +static int +pmu_get_status_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, + struct boardobjgrpmask *mask) +{ + struct nvgpu_pmu *pmu = &g->pmu; + int status = 0; + struct boardobjgrp_pmu_cmd *pcmd = + (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); + + nvgpu_log_info(g, " "); + + if (check_boardobjgrp_param(g, pboardobjgrp) != 0) { + return -EINVAL; + } + + if ((pcmd->buf == NULL) && + (pboardobjgrp->pmu.rpc_func_id == + BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID)) { + return -EINVAL; + } + + /* + * Can only GET_STATUS if the BOARDOBJGRP has been + * previously SET to the PMU + */ + if (!pboardobjgrp->pmu.bset) { + return -EINVAL; + } + + /* + * Initialize PMU buffer with the mask of + * BOARDOBJGRPs for which to retrieve status + */ + (void) memset(pcmd->buf, 0x0, pcmd->fbsize); + status = pboardobjgrp->pmuhdrdatainit(g, pboardobjgrp, + pcmd->buf, mask); + if (status != 0) { + nvgpu_err(g, "could not init PMU HDR data"); + goto pmu_get_status_impl_exit; + } + + /* + * copy constructed pmu boardobjgrp data from + * sysmem to pmu super surface present in FB + */ + nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g, + pmu, pmu->super_surface), + pcmd->super_surface_offset, + pcmd->buf, pcmd->fbsize); + /* Send the GET_STATUS PMU CMD to the PMU */ + status = pmu_cmd_send_rpc(g, pboardobjgrp, + pcmd, true); + if (status != 0) { + nvgpu_err(g, "could not send GET_STATUS cmd to PMU"); + goto pmu_get_status_impl_exit; + } + + /*copy the data back to sysmem buffer that belongs to command*/ + nvgpu_mem_rd_n(g, nvgpu_pmu_super_surface_mem(g, + pmu, pmu->super_surface), + pcmd->super_surface_offset, + pcmd->buf, pcmd->fbsize); + + pmu_get_status_impl_exit: + return status; +} + +int nvgpu_boardobjgrp_construct_super(struct gk20a *g, + struct boardobjgrp *pboardobjgrp) +{ + nvgpu_log_info(g, " "); + + if (pboardobjgrp == NULL) { + return -EINVAL; + } + + if (pboardobjgrp->ppobjects == NULL) { + return -EINVAL; + } + + if (pboardobjgrp->mask == NULL) { + return -EINVAL; + } + + pboardobjgrp->g = g; + pboardobjgrp->objmask = 0; + + pboardobjgrp->classid = 0; + pboardobjgrp->pmu.unitid = BOARDOBJGRP_UNIT_ID_INVALID; + pboardobjgrp->pmu.classid = BOARDOBJGRP_GRP_CLASS_ID_INVALID; + pboardobjgrp->pmu.bset = false; + pboardobjgrp->pmu.rpc_func_id = BOARDOBJGRP_GRP_RPC_FUNC_ID_INVALID; + pboardobjgrp->pmu.set.id = BOARDOBJGRP_GRP_CMD_ID_INVALID; + pboardobjgrp->pmu.getstatus.id = BOARDOBJGRP_GRP_CMD_ID_INVALID; + + /* Initialize basic interfaces */ + pboardobjgrp->destruct = destruct_super; + pboardobjgrp->objinsert = obj_insert_final; + pboardobjgrp->objgetbyidx = obj_get_by_idx_final; + pboardobjgrp->objgetnext = obj_get_next_final; + pboardobjgrp->objremoveanddestroy = + obj_remove_and_destroy_final; + + pboardobjgrp->pmuinithandle = pmu_init_handle_impl; + pboardobjgrp->pmuhdrdatainit = nvgpu_boardobjgrp_pmu_hdr_data_init_super; + pboardobjgrp->pmudatainit = nvgpu_boardobjgrp_pmu_data_init_super; + pboardobjgrp->pmuset = pmu_set_impl; + pboardobjgrp->pmugetstatus = pmu_get_status_impl; + + pboardobjgrp->pmudatainstget = pmu_data_inst_get_stub; + pboardobjgrp->pmustatusinstget = pmu_status_inst_get_stub; + + pboardobjgrp->objmaxidx = CTRL_BOARDOBJ_IDX_INVALID; + pboardobjgrp->bconstructed = true; + + nvgpu_list_add(&pboardobjgrp->node, &g->boardobjgrp_head); + + return 0; +} + + +int nvgpu_boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp + *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, + u16 hdrsize, u16 entrysize, u32 fbsize, u32 ss_offset, u8 rpc_func_id) +{ + nvgpu_log_fn(g, " "); + + /* Copy the parameters into the CMD*/ + cmd->dmem_buffer_size = ((hdrsize > entrysize) ? hdrsize : entrysize); + cmd->super_surface_offset = ss_offset; + pboardobjgrp->pmu.rpc_func_id = rpc_func_id; + cmd->fbsize = fbsize; + + nvgpu_log_fn(g, "DONE"); + return 0; +} + +int nvgpu_boardobjgrp_pmu_hdr_data_init_super(struct gk20a *g, struct boardobjgrp + *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, + struct boardobjgrpmask *mask) +{ + nvgpu_log_info(g, " "); + + if (pboardobjgrp == NULL) { + return -EINVAL; + } + if (pboardobjgrppmu == NULL) { + return -EINVAL; + } + pboardobjgrppmu->type = pboardobjgrp->type; + pboardobjgrppmu->class_id = pboardobjgrp->classid; + pboardobjgrppmu->obj_slots = BOARDOBJGRP_PMU_SLOTS_GET(pboardobjgrp); + pboardobjgrppmu->flags = 0; + + nvgpu_log_info(g, " Done"); + return 0; +} + +int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g, + struct boardobjgrp *pboardobjgrp, + struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) +{ + int status = 0; + struct boardobj *pboardobj = NULL; + struct nv_pmu_boardobj *ppmudata = NULL; + u8 index; + + nvgpu_log_info(g, " "); + + if (pboardobjgrp == NULL) { + return -EINVAL; + } + if (pboardobjgrppmu == NULL) { + return -EINVAL; + } + + nvgpu_boardobjgrp_e32_hdr_set((struct nv_pmu_boardobjgrp *) + (void *)pboardobjgrppmu, pboardobjgrp->objmask); + + BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, index, pboardobjgrp->objmask) { + /* Obtain pointer to the current instance of the + * Object from the Group */ + pboardobj = pboardobjgrp->objgetbyidx(pboardobjgrp, index); + if (NULL == pboardobj) { + nvgpu_err(g, "could not get object instance"); + status = -EINVAL; + goto nvgpu_boardobjgrp_pmu_data_init_legacy_exit; + } + + status = pboardobjgrp->pmudatainstget(g, + (struct nv_pmu_boardobjgrp *) + (void *)pboardobjgrppmu, + &ppmudata, index); + if (status != 0) { + nvgpu_err(g, "could not get object instance"); + goto nvgpu_boardobjgrp_pmu_data_init_legacy_exit; + } + + /* Initialize the PMU Data */ + status = pboardobj->pmudatainit(g, pboardobj, ppmudata); + if (status != 0) { + nvgpu_err(g, + "could not parse pmu for device %d", index); + goto nvgpu_boardobjgrp_pmu_data_init_legacy_exit; + } + } + BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK_END + + nvgpu_boardobjgrp_pmu_data_init_legacy_exit: + nvgpu_log_info(g, " Done"); + return status; +} + + +int nvgpu_boardobjgrp_pmu_data_init_super(struct gk20a *g, struct boardobjgrp + *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) +{ + int status = 0; + struct boardobj *pboardobj = NULL; + struct nv_pmu_boardobj *ppmudata = NULL; + u8 index; + + nvgpu_log_info(g, " "); + + if (pboardobjgrp == NULL) { + return -EINVAL; + } + if (pboardobjgrppmu == NULL) { + return -EINVAL; + } + + /* Initialize the PMU HDR data.*/ + status = pboardobjgrp->pmuhdrdatainit(g, pboardobjgrp, pboardobjgrppmu, + pboardobjgrp->mask); + if (status != 0) { + nvgpu_err(g, "unable to init boardobjgrp pmuhdr data"); + goto boardobjgrp_pmu_data_init_super_exit; + } + + BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) { + status = pboardobjgrp->pmudatainstget(g, + (struct nv_pmu_boardobjgrp *) + (void *)pboardobjgrppmu, &ppmudata, index); + if (status != 0) { + nvgpu_err(g, "could not get object instance"); + goto boardobjgrp_pmu_data_init_super_exit; + } + + /* Initialize the PMU Data and send to PMU */ + status = pboardobj->pmudatainit(g, pboardobj, ppmudata); + if (status != 0) { + nvgpu_err(g, + "could not parse pmu for device %d", index); + goto boardobjgrp_pmu_data_init_super_exit; + } + } + + boardobjgrp_pmu_data_init_super_exit: + nvgpu_log_info(g, " Done"); + return status; +} + +void nvgpu_boardobjgrp_e32_hdr_set(struct nv_pmu_boardobjgrp *hdr, u32 objmask) +{ + u32 slots = objmask; + + HIGHESTBITIDX_32(slots); + slots++; + + hdr->super.type = CTRL_BOARDOBJGRP_TYPE_E32; + hdr->super.class_id = 0; + hdr->super.obj_slots = (u8)slots; + hdr->obj_mask = objmask; +} + diff --git a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e255.c b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e255.c index 28d10463e..895d63f1c 100644 --- a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e255.c +++ b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e255.c @@ -21,50 +21,15 @@ */ #include -#include #include -#include -#include -#include -int boardobjgrpconstruct_e255(struct gk20a *g, - struct boardobjgrp_e255 *pboardobjgrp_e255) -{ - int status = 0; - u8 objslots; - - nvgpu_log_info(g, " "); - - objslots = 255; - status = boardobjgrpmask_e255_init(&pboardobjgrp_e255->mask, NULL); - if (status != 0) { - goto boardobjgrpconstruct_e255_exit; - } - - pboardobjgrp_e255->super.type = CTRL_BOARDOBJGRP_TYPE_E255; - pboardobjgrp_e255->super.ppobjects = pboardobjgrp_e255->objects; - pboardobjgrp_e255->super.objslots = objslots; - pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super); - - status = boardobjgrp_construct_super(g, &pboardobjgrp_e255->super); - if (status != 0) { - goto boardobjgrpconstruct_e255_exit; - } - - pboardobjgrp_e255->super.pmuhdrdatainit = - boardobjgrp_pmuhdrdatainit_e255; - -boardobjgrpconstruct_e255_exit: - return status; -} - -int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, +static int boardobjgrp_pmu_hdr_data_init_e255(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask) { struct nv_pmu_boardobjgrp_e255 *pgrpe255 = - (struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu; + (struct nv_pmu_boardobjgrp_e255 *)(void *)pboardobjgrppmu; int status; nvgpu_log_info(g, " "); @@ -77,7 +42,7 @@ int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, return -EINVAL; } - status = boardobjgrpmask_export(mask, + status = nvgpu_boardobjgrpmask_export(mask, mask->bitcount, &pgrpe255->obj_mask.super); if (status != 0) { @@ -85,6 +50,38 @@ int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, return status; } - return boardobjgrp_pmuhdrdatainit_super(g, + return nvgpu_boardobjgrp_pmu_hdr_data_init_super(g, pboardobjgrp, pboardobjgrppmu, mask); } + +int nvgpu_boardobjgrp_construct_e255(struct gk20a *g, + struct boardobjgrp_e255 *pboardobjgrp_e255) +{ + int status = 0; + u8 objslots; + + nvgpu_log_info(g, " "); + + objslots = 255; + status = boardobjgrpmask_e255_init(&pboardobjgrp_e255->mask, NULL); + if (status != 0) { + goto nvgpu_boardobjgrpconstruct_e255_exit; + } + + pboardobjgrp_e255->super.type = CTRL_BOARDOBJGRP_TYPE_E255; + pboardobjgrp_e255->super.ppobjects = pboardobjgrp_e255->objects; + pboardobjgrp_e255->super.objslots = objslots; + pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super); + + status = nvgpu_boardobjgrp_construct_super(g, &pboardobjgrp_e255->super); + if (status != 0) { + goto nvgpu_boardobjgrpconstruct_e255_exit; + } + + pboardobjgrp_e255->super.pmuhdrdatainit = + boardobjgrp_pmu_hdr_data_init_e255; + +nvgpu_boardobjgrpconstruct_e255_exit: + return status; +} + diff --git a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e32.c b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e32.c index 3ac3debe2..7d733943f 100644 --- a/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e32.c +++ b/drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e32.c @@ -20,49 +20,15 @@ * DEALINGS IN THE SOFTWARE. */ #include -#include -#include #include -#include -#include -int boardobjgrpconstruct_e32(struct gk20a *g, - struct boardobjgrp_e32 *pboardobjgrp_e32) -{ - int status; - u8 objslots; - - nvgpu_log_info(g, " "); - objslots = 32; - - status = boardobjgrpmask_e32_init(&pboardobjgrp_e32->mask, NULL); - if (status != 0) { - goto boardobjgrpconstruct_e32_exit; - } - - pboardobjgrp_e32->super.type = CTRL_BOARDOBJGRP_TYPE_E32; - pboardobjgrp_e32->super.ppobjects = pboardobjgrp_e32->objects; - pboardobjgrp_e32->super.objslots = objslots; - pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super); - - status = boardobjgrp_construct_super(g, &pboardobjgrp_e32->super); - if (status != 0) { - goto boardobjgrpconstruct_e32_exit; - } - - pboardobjgrp_e32->super.pmuhdrdatainit = boardobjgrp_pmuhdrdatainit_e32; - -boardobjgrpconstruct_e32_exit: - return status; -} - -int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, +static int boardobjgrp_pmu_hdr_data_init_e32(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask) { struct nv_pmu_boardobjgrp_e32 *pgrpe32 = - (struct nv_pmu_boardobjgrp_e32 *)pboardobjgrppmu; + (struct nv_pmu_boardobjgrp_e32 *)(void *)pboardobjgrppmu; int status; nvgpu_log_info(g, " "); @@ -74,7 +40,7 @@ int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, if (pboardobjgrppmu == NULL) { return -EINVAL; } - status = boardobjgrpmask_export(mask, + status = nvgpu_boardobjgrpmask_export(mask, mask->bitcount, &pgrpe32->obj_mask.super); if (status != 0) { @@ -82,6 +48,38 @@ int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, return status; } - return boardobjgrp_pmuhdrdatainit_super(g, + return nvgpu_boardobjgrp_pmu_hdr_data_init_super(g, pboardobjgrp, pboardobjgrppmu, mask); } + +int nvgpu_boardobjgrp_construct_e32(struct gk20a *g, + struct boardobjgrp_e32 *pboardobjgrp_e32) +{ + int status; + u8 objslots; + + nvgpu_log_info(g, " "); + objslots = 32; + + status = boardobjgrpmask_e32_init(&pboardobjgrp_e32->mask, NULL); + if (status != 0) { + goto nvgpu_boardobjgrpconstruct_e32_exit; + } + + pboardobjgrp_e32->super.type = CTRL_BOARDOBJGRP_TYPE_E32; + pboardobjgrp_e32->super.ppobjects = pboardobjgrp_e32->objects; + pboardobjgrp_e32->super.objslots = objslots; + pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super); + + status = nvgpu_boardobjgrp_construct_super(g, &pboardobjgrp_e32->super); + if (status != 0) { + goto nvgpu_boardobjgrpconstruct_e32_exit; + } + + pboardobjgrp_e32->super.pmuhdrdatainit = + boardobjgrp_pmu_hdr_data_init_e32; + +nvgpu_boardobjgrpconstruct_e32_exit: + return status; +} + diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobj.h b/drivers/gpu/nvgpu/include/nvgpu/boardobj.h index dd870f09f..e8ee7671c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobj.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobj.h @@ -30,35 +30,20 @@ struct boardobj; struct nvgpu_list_node; struct gk20a; -/* -* check whether the specified BOARDOBJ object implements the queried -* type/class enumeration. -*/ -bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj, - u8 type); - /* * Fills out the appropriate the nv_pmu_xxxx_device_desc_ driver->PMU * description structure, describing this BOARDOBJ board device to the PMU. * */ -int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, - struct nv_pmu_boardobj *pmudata); +int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g, struct boardobj + *pboardobj, struct nv_pmu_boardobj *pmudata); /* * Constructor for the base Board Object. Called by each device-specific * implementation of the BOARDOBJ interface to initialize the board object. */ -int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, - size_t size, void *args); - -/* -* Destructor for the base board object. Called by each device-Specific -* implementation of the BOARDOBJ interface to destroy the board object. -* This has to be explicitly set by each device that extends from the -* board object. -*/ -int boardobj_destruct_super(struct boardobj *pboardobj); +int nvgpu_boardobj_construct_super(struct gk20a *g, struct boardobj + **ppboardobj, size_t size, void *args); /* * Base Class for all physical or logical device on the PCB. @@ -87,9 +72,71 @@ struct boardobj { struct nvgpu_list_node node; }; +struct boardobjgrp_pmucmdhandler_params { + /* Pointer to the BOARDOBJGRP associated with this CMD */ + struct boardobjgrp *pboardobjgrp; + /* Pointer to structure representing this NV_PMU_BOARDOBJ_CMD_GRP */ + struct boardobjgrp_pmu_cmd *pcmd; + /* Boolean indicating whether the PMU successfully handled the CMD */ + u32 success; +}; + #define BOARDOBJ_GET_TYPE(pobj) (((struct boardobj *)(pobj))->type) #define BOARDOBJ_GET_IDX(pobj) (((struct boardobj *)(pobj))->idx) +#define HIGHESTBITIDX_32(n32) \ +{ \ + u32 count = 0U; \ + while (((n32) >>= 1U) != 0U) { \ + count++; \ + } \ + (n32) = count; \ +} + +#define LOWESTBIT(x) ((x) & (((x)-1U) ^ (x))) + +#define HIGHESTBIT(n32) \ +{ \ + HIGHESTBITIDX_32(n32); \ + n32 = NVBIT(n32); \ +} + +#define ONEBITSET(x) ((x) && (((x) & ((x)-1U)) == 0U)) + +#define LOWESTBITIDX_32(n32) \ +{ \ + n32 = LOWESTBIT(n32); \ + IDX_32(n32); \ +} + +#define NUMSETBITS_32(n32) \ +{ \ + (n32) = (n32) - (((n32) >> 1U) & 0x55555555U); \ + (n32) = ((n32) & 0x33333333U) + (((n32) >> 2U) & 0x33333333U); \ + (n32) = ((((n32) + ((n32) >> 4U)) & 0x0F0F0F0FU) * 0x01010101U) >> 24U;\ +} + +#define IDX_32(n32) \ +{ \ + u32 idx = 0U; \ + if (((n32) & 0xFFFF0000U) != 0U) { \ + idx += 16U; \ + } \ + if (((n32) & 0xFF00FF00U) != 0U) { \ + idx += 8U; \ + } \ + if (((n32) & 0xF0F0F0F0U) != 0U) { \ + idx += 4U; \ + } \ + if (((n32) & 0xCCCCCCCCU) != 0U) { \ + idx += 2U; \ + } \ + if (((n32) & 0xAAAAAAAAU) != 0U) { \ + idx += 1U; \ + } \ + (n32) = idx; \ +} + static inline struct boardobj * boardobj_from_node(struct nvgpu_list_node *node) { diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h index df8dbb20f..2990f19f5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h @@ -34,13 +34,6 @@ struct nvgpu_list_node; #include #include -/* -* Board Object Group destructor. -* -*/ -int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp); -int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp); - /* * Board Object Group Remover and destructor. This is used to remove and * destruct specific entry from the Board Object Group. @@ -48,19 +41,11 @@ int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp); int boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, u8 index); -/* -* BOARDOBJGRP handler for PMU_UNIT_INIT. Calls the PMU_UNIT_INIT handlers -* for the constructed PMU CMDs, and then sets the object via the -* PMU_BOARDOBJ_CMD_GRP interface (if constructed). -*/ -int boardobjgrp_pmuinithandle_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp); - /* * Fills out the appropriate the PMU_BOARDOBJGRP_ driver<->PMU description * header structure, more specifically a mask of BOARDOBJs. */ -int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, +int nvgpu_boardobjgrp_pmu_hdr_data_init_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, struct boardobjgrpmask *mask); @@ -69,34 +54,13 @@ int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, * Fills out the appropriate the PMU_BOARDOBJGRP_ driver->PMU description * structure, describing the BOARDOBJGRP and all of its BOARDOBJs to the PMU. */ -int boardobjgrp_pmudatainit_super(struct gk20a *g, +int nvgpu_boardobjgrp_pmu_data_init_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu); -int boardobjgrp_pmudatainit_legacy(struct gk20a *g, +int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu); -/* -* Sends a BOARDOBJGRP to the PMU via the PMU_BOARDOBJ_CMD_GRP interface. -* This interface leverages @ref boardobjgrp_pmudatainit to populate the -* structure. -*/ -int boardobjgrp_pmuset_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp); -int boardobjgrp_pmuset_impl_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp); - -/* -* Gets the dynamic status of the PMU BOARDOBJGRP via the -* PMU_BOARDOBJ_CMD_GRP GET_STATUS interface. -*/ -int boardobjgrp_pmugetstatus_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrpmask *mask); -int boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrpmask *mask); - /* * Structure describing an PMU CMD for interacting with the representaition * of this BOARDOBJGRP within the PMU. @@ -137,32 +101,12 @@ struct boardobjgrp_pmu { * CMD. This provides the various information describing the PMU CMD including * the CMD and MSG ID and the size of the various sturctures in the payload. */ -int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, + +int nvgpu_boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, u16 hdrsize, u16 entrysize, - u16 fbsize, u32 ss_offset, u8 rpc_func_id); - -int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *cmd, u8 id, - u8 msgid, u16 hdrsize, u16 entrysize, - u16 fbsize, u32 ss_offset, u8 rpc_func_id); - -/* -* Destroys BOARDOBJGRP PMU SW state. CMD. -*/ -int boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, - struct boardobjgrp_pmu_cmd *cmd); - -/* -* init handler for the BOARDOBJGRP PMU CMD. Allocates and maps the -* PMU CMD payload within both the PMU and driver so that it can be referenced -* at run-time. -*/ -int boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd); + u32 fbsize, u32 ss_offset, u8 rpc_func_id); /* * Base Class Group for all physical or logical device on the PCB. @@ -332,14 +276,16 @@ do { \ #define BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, eng, ENG, \ class, CLASS) \ - ((g)->pmu.fw.ops.boardobj.boardobjgrp_pmucmd_construct_impl( \ + (nvgpu_boardobjgrp_pmucmd_construct_impl( \ g, /* pgpu */ \ pboardobjgrp, /* pboardobjgrp */ \ &((pboardobjgrp)->pmu.set), /* pcmd */ \ NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_SET, /* id */ \ NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_SET, /* msgid */ \ - (u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_set_header_aligned), \ - (u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_set_union_aligned), \ + (u32)sizeof(union nv_pmu_##eng##_##class## \ + _boardobjgrp_set_header_aligned), \ + (u32)sizeof(union nv_pmu_##eng##_##class## \ + _boardobj_set_union_aligned), \ (u32)nvgpu_pmu_get_ss_member_set_size(g, &g->pmu, \ NV_PMU_SUPER_SURFACE_MEMBER_##CLASS##_GRP), \ (u32)nvgpu_pmu_get_ss_member_set_offset(g, &g->pmu, \ @@ -348,14 +294,16 @@ do { \ #define BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, pboardobjgrp, \ eng, ENG, class, CLASS) \ - ((g)->pmu.fw.ops.boardobj.boardobjgrp_pmucmd_construct_impl( \ + (nvgpu_boardobjgrp_pmucmd_construct_impl( \ g, /* pGpu */ \ pboardobjgrp, /* pBoardObjGrp */ \ &((pboardobjgrp)->pmu.getstatus), /* pCmd */ \ NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_GET_STATUS, /* id */ \ NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_GET_STATUS, /* msgid */ \ - (u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_get_status_header_aligned), \ - (u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_get_status_union_aligned), \ + (u32)sizeof(union nv_pmu_##eng##_##class## \ + _boardobjgrp_get_status_header_aligned), \ + (u32)sizeof(union nv_pmu_##eng##_##class## \ + _boardobj_get_status_union_aligned), \ (u32)nvgpu_pmu_get_ss_member_get_status_size(g, &g->pmu, \ NV_PMU_SUPER_SURFACE_MEMBER_##CLASS##_GRP), \ (u32)nvgpu_pmu_get_ss_member_get_status_offset(g, &g->pmu, \ @@ -364,63 +312,10 @@ do { \ /* ------------------------ Function Prototypes ----------------------------- */ /* Constructor and destructor */ -int boardobjgrp_construct_super(struct gk20a *g, +int nvgpu_boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp); -void boardobjgrpe32hdrset(struct nv_pmu_boardobjgrp *hdr, u32 objmask); - -#define HIGHESTBITIDX_32(n32) \ -{ \ - u32 count = 0U; \ - while (((n32) >>= 1U) != 0U) { \ - count++; \ - } \ - (n32) = count; \ -} - -#define LOWESTBIT(x) ((x) & (((x)-1U) ^ (x))) - -#define HIGHESTBIT(n32) \ -{ \ - HIGHESTBITIDX_32(n32); \ - n32 = NVBIT(n32); \ -} - -#define ONEBITSET(x) ((x) && (((x) & ((x)-1U)) == 0U)) - -#define LOWESTBITIDX_32(n32) \ -{ \ - n32 = LOWESTBIT(n32); \ - IDX_32(n32); \ -} - -#define NUMSETBITS_32(n32) \ -{ \ - (n32) = (n32) - (((n32) >> 1U) & 0x55555555U); \ - (n32) = ((n32) & 0x33333333U) + (((n32) >> 2U) & 0x33333333U); \ - (n32) = ((((n32) + ((n32) >> 4U)) & 0x0F0F0F0FU) * 0x01010101U) >> 24U;\ -} - -#define IDX_32(n32) \ -{ \ - u32 idx = 0U; \ - if (((n32) & 0xFFFF0000U) != 0U) { \ - idx += 16U; \ - } \ - if (((n32) & 0xFF00FF00U) != 0U) { \ - idx += 8U; \ - } \ - if (((n32) & 0xF0F0F0F0U) != 0U) { \ - idx += 4U; \ - } \ - if (((n32) & 0xCCCCCCCCU) != 0U) { \ - idx += 2U; \ - } \ - if (((n32) & 0xAAAAAAAAU) != 0U) { \ - idx += 1U; \ - } \ - (n32) = idx; \ -} +void nvgpu_boardobjgrp_e32_hdr_set(struct nv_pmu_boardobjgrp *hdr, u32 objmask); static inline struct boardobjgrp * boardobjgrp_from_node(struct nvgpu_list_node *node) @@ -429,10 +324,4 @@ boardobjgrp_from_node(struct nvgpu_list_node *node) ((uintptr_t)node - offsetof(struct boardobjgrp, node)); }; -int is_boardobjgrp_pmucmd_id_valid_v0(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *pcmd); -int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct boardobjgrp_pmu_cmd *cmd); #endif /* NVGPU_BOARDOBJGRP_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h index d475d90e6..4056917b1 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h @@ -23,7 +23,6 @@ #ifndef NVGPU_BOARDOBJGRP_E255_H #define NVGPU_BOARDOBJGRP_E255_H -#include #include #include @@ -38,16 +37,13 @@ struct boardobjgrp_e255 { struct boardobjgrpmask_e255 mask; }; -#define boardobjgrp_pmudatainit_e255(g, pboardpbjgrp, pboardobjgrppmu) \ - boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) +#define boardobjgrp_pmu_data_init_e255(g, pboardpbjgrp, pboardobjgrppmu) \ + nvgpu_boardobjgrp_pmu_data_init_super(g, \ + pboardpbjgrp, pboardobjgrppmu) /* Constructor and destructor */ -int boardobjgrpconstruct_e255(struct gk20a *g, +int nvgpu_boardobjgrp_construct_e255(struct gk20a *g, struct boardobjgrp_e255 *pboardobjgrp_e255); -int boardobjgrpdestruct_e255(struct boardobjgrp *pboardobjgrp); -int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, - struct boardobjgrpmask *mask); +int boardobjgrp_destruct_e255(struct boardobjgrp *pboardobjgrp); #endif /* NVGPU_BOARDOBJGRP_E255_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h index 11ce05984..abede998a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h @@ -23,7 +23,6 @@ #ifndef NVGPU_BOARDOBJGRP_E32_H #define NVGPU_BOARDOBJGRP_E32_H -#include #include #include @@ -53,15 +52,11 @@ struct boardobjgrp_e32 { * implement this interface. */ #define boardobjgrp_pmudatainit_e32(g, pboardpbjgrp, pboardobjgrppmu) \ - boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) + nvgpu_boardobjgrp_pmu_data_init_super(g, pboardpbjgrp, \ + pboardobjgrppmu) /* Constructor and destructor */ -int boardobjgrpconstruct_e32(struct gk20a *g, +int nvgpu_boardobjgrp_construct_e32(struct gk20a *g, struct boardobjgrp_e32 *pboardobjgrp_e32); -int boardobjgrpdestruct_e32(struct boardobjgrp *pboardobjgrp); -int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, - struct boardobjgrp *pboardobjgrp, - struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, - struct boardobjgrpmask *mask); - +int boardobjgrp_destruct_e32(struct boardobjgrp *pboardobjgrp); #endif /* NVGPU_BOARDOBJGRP_E32_H */