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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
Open source GPL/LGPL release
This commit is contained in:
229
drivers/gpu/nvgpu/common/ltc/ltc.c
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229
drivers/gpu/nvgpu/common/ltc/ltc.c
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/*
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* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/ltc.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/cic.h>
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#include <nvgpu/string.h>
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void nvgpu_ltc_remove_support(struct gk20a *g)
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{
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struct nvgpu_ltc *ltc = g->ltc;
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nvgpu_log_fn(g, " ");
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if (ltc == NULL) {
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return;
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}
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nvgpu_kfree(g, ltc);
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g->ltc = NULL;
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}
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int nvgpu_init_ltc_support(struct gk20a *g)
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{
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struct nvgpu_ltc *ltc = g->ltc;
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int err;
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nvgpu_log_fn(g, " ");
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g->mm.ltc_enabled_current = true;
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g->mm.ltc_enabled_target = true;
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if (ltc == NULL) {
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ltc = nvgpu_kzalloc(g, sizeof(*ltc));
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if (ltc == NULL) {
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return -ENOMEM;
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}
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g->ltc = ltc;
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nvgpu_spinlock_init(&g->ltc->ltc_enabled_lock);
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}
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if (g->ops.ltc.init_fs_state != NULL) {
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g->ops.ltc.init_fs_state(g);
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}
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if ((g->ops.ltc.ecc_init != NULL) && !g->ecc.initialized) {
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err = g->ops.ltc.ecc_init(g);
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if (err != 0) {
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nvgpu_kfree(g, ltc);
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g->ltc = NULL;
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return err;
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}
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}
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if (g->ops.ltc.intr.configure != NULL) {
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nvgpu_cic_intr_stall_unit_config(g, NVGPU_CIC_INTR_UNIT_LTC,
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NVGPU_CIC_INTR_ENABLE);
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g->ops.ltc.intr.configure(g);
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}
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return 0;
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}
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void nvgpu_ltc_sync_enabled(struct gk20a *g)
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{
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if (g->ops.ltc.set_enabled == NULL) {
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return;
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}
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nvgpu_spinlock_acquire(&g->ltc->ltc_enabled_lock);
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if (g->mm.ltc_enabled_current != g->mm.ltc_enabled_target) {
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g->ops.ltc.set_enabled(g, g->mm.ltc_enabled_target);
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g->mm.ltc_enabled_current = g->mm.ltc_enabled_target;
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}
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nvgpu_spinlock_release(&g->ltc->ltc_enabled_lock);
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}
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u32 nvgpu_ltc_get_ltc_count(struct gk20a *g)
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{
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return g->ltc->ltc_count;
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}
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u32 nvgpu_ltc_get_slices_per_ltc(struct gk20a *g)
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{
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return g->ltc->slices_per_ltc;
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}
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u32 nvgpu_ltc_get_cacheline_size(struct gk20a *g)
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{
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return g->ltc->cacheline_size;
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}
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int nvgpu_ecc_counter_init_per_lts(struct gk20a *g,
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struct nvgpu_ecc_stat ***stat, const char *name)
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{
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struct nvgpu_ecc_stat **stats;
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u32 ltc, lts;
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char ltc_str[10] = {0}, lts_str[10] = {0};
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int err = 0;
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u32 ltc_count = nvgpu_ltc_get_ltc_count(g);
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u32 slices_per_ltc = nvgpu_ltc_get_slices_per_ltc(g);
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stats = nvgpu_kzalloc(g, nvgpu_safe_mult_u64(sizeof(*stats),
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ltc_count));
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if (stats == NULL) {
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return -ENOMEM;
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}
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for (ltc = 0; ltc < ltc_count; ltc++) {
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stats[ltc] = nvgpu_kzalloc(g,
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nvgpu_safe_mult_u64(sizeof(*stats[ltc]),
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slices_per_ltc));
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if (stats[ltc] == NULL) {
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err = -ENOMEM;
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goto fail;
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}
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}
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for (ltc = 0; ltc < ltc_count; ltc++) {
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for (lts = 0; lts < slices_per_ltc; lts++) {
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/**
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* Store stats name as below:
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* ltc<ltc_value>_lts<lts_value>_<name_string>
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*/
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(void)strcpy(stats[ltc][lts].name, "ltc");
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(void)nvgpu_strnadd_u32(ltc_str, ltc,
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sizeof(ltc_str), 10U);
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(void)strncat(stats[ltc][lts].name, ltc_str,
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NVGPU_ECC_STAT_NAME_MAX_SIZE -
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strlen(stats[ltc][lts].name));
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(void)strncat(stats[ltc][lts].name, "_lts",
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NVGPU_ECC_STAT_NAME_MAX_SIZE -
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strlen(stats[ltc][lts].name));
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(void)nvgpu_strnadd_u32(lts_str, lts,
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sizeof(lts_str), 10U);
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(void)strncat(stats[ltc][lts].name, lts_str,
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NVGPU_ECC_STAT_NAME_MAX_SIZE -
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strlen(stats[ltc][lts].name));
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(void)strncat(stats[ltc][lts].name, "_",
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NVGPU_ECC_STAT_NAME_MAX_SIZE -
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strlen(stats[ltc][lts].name));
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(void)strncat(stats[ltc][lts].name, name,
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NVGPU_ECC_STAT_NAME_MAX_SIZE -
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strlen(stats[ltc][lts].name));
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nvgpu_ecc_stat_add(g, &stats[ltc][lts]);
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}
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}
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*stat = stats;
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fail:
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if (err != 0) {
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while (ltc-- > 0u) {
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nvgpu_kfree(g, stats[ltc]);
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}
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nvgpu_kfree(g, stats);
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}
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return err;
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}
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void nvgpu_ltc_ecc_free(struct gk20a *g)
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{
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struct nvgpu_ecc *ecc = &g->ecc;
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struct nvgpu_ecc_stat *stat;
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u32 slices_per_ltc;
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u32 ltc_count;
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u32 ltc, lts;
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if (g->ltc == NULL) {
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return;
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}
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ltc_count = nvgpu_ltc_get_ltc_count(g);
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slices_per_ltc = nvgpu_ltc_get_slices_per_ltc(g);
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for (ltc = 0; ltc < ltc_count; ltc++) {
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if (ecc->ltc.ecc_sec_count != NULL &&
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ecc->ltc.ecc_sec_count[ltc] != NULL) {
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for (lts = 0; lts < slices_per_ltc; lts++) {
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stat = &ecc->ltc.ecc_sec_count[ltc][lts];
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nvgpu_ecc_stat_del(g, stat);
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}
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nvgpu_kfree(g, ecc->ltc.ecc_sec_count[ltc]);
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ecc->ltc.ecc_sec_count[ltc] = NULL;
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}
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if (ecc->ltc.ecc_ded_count != NULL &&
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ecc->ltc.ecc_ded_count[ltc] != NULL) {
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for (lts = 0; lts < slices_per_ltc; lts++) {
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stat = &ecc->ltc.ecc_ded_count[ltc][lts];
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nvgpu_ecc_stat_del(g, stat);
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}
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nvgpu_kfree(g, ecc->ltc.ecc_ded_count[ltc]);
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ecc->ltc.ecc_ded_count[ltc] = NULL;
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}
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}
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nvgpu_kfree(g, ecc->ltc.ecc_sec_count);
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ecc->ltc.ecc_sec_count = NULL;
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nvgpu_kfree(g, ecc->ltc.ecc_ded_count);
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ecc->ltc.ecc_ded_count = NULL;
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}
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