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Open source GPL/LGPL release
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svcmobrel-release
26
userspace/units/interface/atomic/Makefile
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26
userspace/units/interface/atomic/Makefile
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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.SUFFIXES:
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OBJS = atomic.o
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MODULE = atomic
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include ../../Makefile.units
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23
userspace/units/interface/atomic/Makefile.interface.tmk
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23
userspace/units/interface/atomic/Makefile.interface.tmk
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################################### tell Emacs this is a -*- makefile-gmake -*-
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#
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# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved.
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#
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# NVIDIA CORPORATION and its licensors retain all intellectual property
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# and proprietary rights in and to this software, related documentation
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# and any modifications thereto. Any use, reproduction, disclosure or
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# distribution of this software and related documentation without an express
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# license agreement from NVIDIA CORPORATION is strictly prohibited.
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#
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# tmake for SW Mobile component makefile
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#
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###############################################################################
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NVGPU_UNIT_NAME=atomic
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include $(NV_COMPONENT_DIR)/../../Makefile.units.common.interface.tmk
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# Local Variables:
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# indent-tabs-mode: t
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# tab-width: 8
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# End:
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# vi: set tabstop=8 noexpandtab:
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28
userspace/units/interface/atomic/Makefile.tmk
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28
userspace/units/interface/atomic/Makefile.tmk
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################################### tell Emacs this is a -*- makefile-gmake -*-
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#
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# Copyright (c) 2019, NVIDIA CORPORATION. All Rights Reserved.
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#
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# NVIDIA CORPORATION and its licensors retain all intellectual property
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# and proprietary rights in and to this software, related documentation
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# and any modifications thereto. Any use, reproduction, disclosure or
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# distribution of this software and related documentation without an express
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# license agreement from NVIDIA CORPORATION is strictly prohibited.
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#
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# tmake for SW Mobile component makefile
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#
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###############################################################################
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NVGPU_UNIT_NAME=atomic
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NVGPU_UNIT_SRCS=atomic.c
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ifneq ($(NV_BUILD_CONFIGURATION_OS_IS_QNX),1)
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NVGPU_UNIT_SHARED_LIBRARIES += pthread
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endif
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include $(NV_COMPONENT_DIR)/../../Makefile.units.common.tmk
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# Local Variables:
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# indent-tabs-mode: t
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# tab-width: 8
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# End:
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# vi: set tabstop=8 noexpandtab:
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1512
userspace/units/interface/atomic/atomic.c
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1512
userspace/units/interface/atomic/atomic.c
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File diff suppressed because it is too large
Load Diff
255
userspace/units/interface/atomic/atomic.h
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255
userspace/units/interface/atomic/atomic.h
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/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_INTERFACE_ATOMIC_H
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#define UNIT_INTERFACE_ATOMIC_H
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struct gk20a;
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struct unit_module;
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/** @addtogroup SWUTS-interface-atomic
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* @{
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*
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* Software Unit Test Specification for interface-atomic
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*/
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/**
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* Test specification for: test_atomic_set_and_read
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*
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* Description: Test atomic set and read operations.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_set, nvgpu_atomic64_set,
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* nvgpu_atomic_read, nvgpu_atomic64_read
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Set the limit values for each atomic's size and read back to verify.
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* - Loop through setting each bit in the atomic, reading each time to verify.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_set_and_read(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_arithmetic
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*
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* Description: Test arithemtic atomic operations inc, dec, add, sub and friends
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* (except add_unless) single threaded for proper functionality.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_inc, nvgpu_atomic64_inc,
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* nvgpu_atomic_inc_return, nvgpu_atomic64_inc_return,
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* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
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* nvgpu_atomic_dec, nvgpu_atomic64_dec,
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* nvgpu_atomic_dec_return, nvgpu_atomic64_dec_return,
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* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
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* nvgpu_atomic_add, nvgpu_atomic64_add,
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* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
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* nvgpu_atomic_sub, nvgpu_atomic64_sub,
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* nvgpu_atomic_sub_return, nvgpu_atomic64_sub_return,
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* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
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* nvgpu_atomic_read, nvgpu_atomic64_read,
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* nvgpu_atomic_set, nvgpu_atomic64_set
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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* For *_and_test ops, the args should make sure the loop traverses
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* across 0 to test the "test" part.
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*
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* Steps:
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* - Sets a start value from args.
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* - Loops (iterations per args param).
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* - Validates final result.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_arithmetic(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_arithmetic_threaded
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*
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* Description: Test atomic operations inc, dec, add, sub, cmpxchg, in threads
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* to verify atomicity.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
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* nvgpu_atomic_inc, nvgpu_atomic64_inc,
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* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
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* nvgpu_atomic_dec, nvgpu_atomic64_dec,
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* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
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* nvgpu_atomic_add, nvgpu_atomic64_add,
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* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
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* nvgpu_atomic_sub, nvgpu_atomic64_sub,
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* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
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* nvgpu_atomic_read, nvgpu_atomic64_read,
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* nvgpu_atomic_set, nvgpu_atomic64_set,
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* nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Sets initial start value.
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* - Kicks off threads to loop running ops.
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* - When threads finish loops, verify values.
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* - With the ops that have a return, save the final value for each thread and
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* use that to try to ensure that the threads aren't executing sequentially.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_arithmetic_threaded(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_arithmetic_and_test_threaded
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*
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* Description: Test arithmetic *_and_test functions in threads to verify
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* atomicity.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
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* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
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* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
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* nvgpu_atomic_read, nvgpu_atomic64_read,
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* nvgpu_atomic_set, nvgpu_atomic64_set
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Set the atomic to a value to allow the arithmetic op to pass 0.
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* - Start a lot of threads that will each execute the atomic op many times to
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* ensure concurrency.
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* - If the atomic op reports the value is zero, this iteration is recorded.
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* - Check iteration count to make sure only 0 was observed exactly once.
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* - Repeat above steps until reaching the input argument repeat_count or seeing
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* a failure.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_arithmetic_and_test_threaded(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_xchg
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*
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* Description: Test xchg op single threaded for proper functionality.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
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* nvgpu_atomic_set, nvgpu_atomic64_set,
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* nvgpu_atomic_read, nvgpu_atomic64_read
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Loops calling xchg op with different values making sure the returned
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* value is the last one written.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_xchg(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_xchg_threaded
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*
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* Description: Test atomic exchange operation with threads to test atomicity.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
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* nvgpu_atomic_set, nvgpu_atomic64_set,
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* nvgpu_atomic_read, nvgpu_atomic64_read
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Set the atomic to a starting value.
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* - Setup and start the exchange threads.
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* - Setup includes setting each thread's "xchg_val" to its thread number.
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* - When threads complete, loop through the thread's xchg_val and make sure
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* each number is unique and someone still has the starting value.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_xchg_threaded(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_cmpxchg
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*
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* Description: Test cmpxchg single threaded for proper functionality.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
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* nvgpu_atomic_set, nvgpu_atomic64_set,
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* nvgpu_atomic_read, nvgpu_atomic64_read
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Loop calling cmpxchg. Alternating between matching and not matching.
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* - Verify correct behavior for each call to the operation.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_cmpxchg(struct unit_module *m,
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struct gk20a *g, void *__args);
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/**
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* Test specification for: test_atomic_add_unless
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*
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* Description: Test add_unless op single threaded for proper functionality.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
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*
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* Input: struct atomic_test_args passed via the __args parameter.
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*
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* Steps:
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* - Loop through calling the operation. Alternating whether the add should
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* occur or not (i.e. changing the "unless" value).
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* - Verify correct behavior for each operation.
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*
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_atomic_add_unless(struct unit_module *m,
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struct gk20a *g, void *__args);
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#endif /* UNIT_INTERFACE_ATOMIC_H */
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