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gpu: nvgpu: split perfbuf initialization
gk20a_perfbuf_map() allocates perfbuf VM, maps the user buffer into new
VM, and then triggers gops.perfbuf.perfbuf_enable(). This HAL then does
following :
- Allocate perfbuf instance block
- Initialize perfbuf instance block
- Reset stream buffer
- Program instance block address in PMA registers
- Program user buffer address into PMA registers
New profiler interface will have it's own API to setup PMA strem, and
it requires above setup to be done in two phases of perfbuf
initialization and then user buffer setup.
Split above functionalities into below functions
- nvgpu_perfbuf_init_vm()
- Allocate perfbuf VM
- Call gops.perfbuf.init_inst_block() to initialize perfbuf instance
block
- gops.perfbuf.init_inst_block()
- Allocate perfbuf instance block
- Initialize perfbuf instance block
- Program instance block address in PMA registers using
gops.perf.init_inst_block()
- In case of vGPU, trigger TEGRA_VGPU_CMD_PERFBUF_INST_BLOCK_MGT
command to gpu server
- gops.perf.init_inst_block()
- Reset stream buffer
- Program user buffer address into PMA registers
Also add corresponding cleanup functions as below :
gops.perf.deinit_inst_block()
gops.perfbuf.deinit_inst_block()
nvgpu_perfbuf_deinit_vm()
Bug 2510974
Jira NVGPU-5360
Change-Id: I486370f21012cbb7fea84fe46fb16db95bc16790
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2372984
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
12e71f22f8
commit
f34711d3de
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -58,3 +58,35 @@ int vgpu_perfbuffer_disable(struct gk20a *g)
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{
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return vgpu_sendrecv_perfbuf_cmd(g, 0, 0);
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}
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static int vgpu_sendrecv_perfbuf_inst_block_cmd(struct gk20a *g, u32 mode)
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{
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struct mm_gk20a *mm = &g->mm;
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struct vm_gk20a *vm = mm->perfbuf.vm;
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struct tegra_vgpu_cmd_msg msg;
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struct tegra_vgpu_perfbuf_inst_block_mgt_params *p =
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&msg.params.perfbuf_inst_block_management;
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int err;
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msg.cmd = TEGRA_VGPU_CMD_PERFBUF_INST_BLOCK_MGT;
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msg.handle = vgpu_get_handle(g);
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p->vm_handle = vm->handle;
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p->mode = mode;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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return err;
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}
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int vgpu_perfbuffer_init_inst_block(struct gk20a *g)
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{
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return vgpu_sendrecv_perfbuf_inst_block_cmd(g,
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TEGRA_VGPU_PROF_PERFBUF_INST_BLOCK_INIT);
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}
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void vgpu_perfbuffer_deinit_inst_block(struct gk20a *g)
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{
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vgpu_sendrecv_perfbuf_inst_block_cmd(g,
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TEGRA_VGPU_PROF_PERFBUF_INST_BLOCK_DEINIT);
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}
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