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gpu: nvgpu: split perfbuf initialization

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gk20a_perfbuf_map() allocates perfbuf VM, maps the user buffer into new
VM, and then triggers gops.perfbuf.perfbuf_enable(). This HAL then does
following :
- Allocate perfbuf instance block
- Initialize perfbuf instance block
- Reset stream buffer
- Program instance block address in PMA registers
- Program user buffer address into PMA registers

New profiler interface will have it's own API to setup PMA strem, and
it requires above setup to be done in two phases of perfbuf
initialization and then user buffer setup.

Split above functionalities into below functions
- nvgpu_perfbuf_init_vm()
  - Allocate perfbuf VM
  - Call gops.perfbuf.init_inst_block() to initialize perfbuf instance
    block

- gops.perfbuf.init_inst_block()
  - Allocate perfbuf instance block
  - Initialize perfbuf instance block
  - Program instance block address in PMA registers using
    gops.perf.init_inst_block()
  - In case of vGPU, trigger TEGRA_VGPU_CMD_PERFBUF_INST_BLOCK_MGT
    command to gpu server

- gops.perf.init_inst_block()
  - Reset stream buffer
  - Program user buffer address into PMA registers

Also add corresponding cleanup functions as below :
gops.perf.deinit_inst_block()
gops.perfbuf.deinit_inst_block()
nvgpu_perfbuf_deinit_vm()

Bug 2510974
Jira NVGPU-5360

Change-Id: I486370f21012cbb7fea84fe46fb16db95bc16790
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2372984
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-05-20 12:03:30 +05:30
committed by Alex Waterman
parent 12e71f22f8
commit f34711d3de
18 changed files with 188 additions and 57 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
drivers/gpu/nvgpu/hal/perf/perf_gv11b.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -70,12 +70,10 @@ void gv11b_perf_membuf_reset_streaming(struct gk20a *g)
}
}
void gv11b_perf_enable_membuf(struct gk20a *g, u32 size,
u64 buf_addr, struct nvgpu_mem *inst_block)
void gv11b_perf_enable_membuf(struct gk20a *g, u32 size, u64 buf_addr)
{
u32 addr_lo;
u32 addr_hi;
u32 inst_block_ptr;
addr_lo = u64_lo32(buf_addr);
addr_hi = u64_hi32(buf_addr);
@@ -84,8 +82,19 @@ void gv11b_perf_enable_membuf(struct gk20a *g, u32 size,
nvgpu_writel(g, perf_pmasys_outbaseupper_r(),
perf_pmasys_outbaseupper_ptr_f(addr_hi));
nvgpu_writel(g, perf_pmasys_outsize_r(), size);
}
inst_block_ptr = nvgpu_inst_block_ptr(g, inst_block);
void gv11b_perf_disable_membuf(struct gk20a *g)
{
nvgpu_writel(g, perf_pmasys_outbase_r(), 0);
nvgpu_writel(g, perf_pmasys_outbaseupper_r(),
perf_pmasys_outbaseupper_ptr_f(0));
nvgpu_writel(g, perf_pmasys_outsize_r(), 0);
}
void gv11b_perf_init_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block)
{
u32 inst_block_ptr = nvgpu_inst_block_ptr(g, inst_block);
nvgpu_writel(g, perf_pmasys_mem_block_r(),
perf_pmasys_mem_block_base_f(inst_block_ptr) |
@@ -96,13 +105,8 @@ void gv11b_perf_enable_membuf(struct gk20a *g, u32 size,
perf_pmasys_mem_block_target_lfb_f()));
}
void gv11b_perf_disable_membuf(struct gk20a *g)
void gv11b_perf_deinit_inst_block(struct gk20a *g)
{
nvgpu_writel(g, perf_pmasys_outbase_r(), 0);
nvgpu_writel(g, perf_pmasys_outbaseupper_r(),
perf_pmasys_outbaseupper_ptr_f(0));
nvgpu_writel(g, perf_pmasys_outsize_r(), 0);
nvgpu_writel(g, perf_pmasys_mem_block_r(),
perf_pmasys_mem_block_base_f(0) |
perf_pmasys_mem_block_valid_false_f() |