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gpu: nvgpu: gv100: add support for FECS trace

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- This patch sets required fecs trace functions to hals.
- In gv100, GPU VA needs to programmed in ucode to
get FECS trace. Hence, setting this "NVGPU_FECS_TRACE_VA"
characteristic to be true.

EVLR-2708

Change-Id: I41845a1db8452b8e3fa9d67ecc4cabfac503fd0b
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1747269
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vaibhav Kachore
2018-06-12 15:31:34 +05:30
committed by mobile promotions
parent 8351b54160
commit f37d958ce2
1 changed files with 15 additions and 13 deletions
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28
drivers/gpu/nvgpu/gv100/hal_gv100.c
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@@ -637,20 +637,20 @@ static const struct gpu_ops gv100_ops = {
},
#ifdef CONFIG_GK20A_CTXSW_TRACE
.fecs_trace = {
.alloc_user_buffer = NULL,
.free_user_buffer = NULL,
.mmap_user_buffer = NULL,
.init = NULL,
.deinit = NULL,
.enable = NULL,
.disable = NULL,
.is_enabled = NULL,
.reset = NULL,
.alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc,
.free_user_buffer = gk20a_ctxsw_dev_ring_free,
.mmap_user_buffer = gk20a_ctxsw_dev_mmap_buffer,
.init = gk20a_fecs_trace_init,
.deinit = gk20a_fecs_trace_deinit,
.enable = gk20a_fecs_trace_enable,
.disable = gk20a_fecs_trace_disable,
.is_enabled = gk20a_fecs_trace_is_enabled,
.reset = gk20a_fecs_trace_reset,
.flush = NULL,
.poll = NULL,
.bind_channel = NULL,
.unbind_channel = NULL,
.max_entries = NULL,
.poll = gk20a_fecs_trace_poll,
.bind_channel = gk20a_fecs_trace_bind_channel,
.unbind_channel = gk20a_fecs_trace_unbind_channel,
.max_entries = gk20a_gr_max_entries,
},
#endif /* CONFIG_GK20A_CTXSW_TRACE */
.mm = {
@@ -939,6 +939,8 @@ int gv100_init_hal(struct gk20a *g)
__nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true);
__nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false);
__nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true);
/* for now */
__nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);