diff --git a/libs/dgpu/libnvgpu-drv-dgpu_safe.export b/libs/dgpu/libnvgpu-drv-dgpu_safe.export
index 26de16814..0e367d634 100644
--- a/libs/dgpu/libnvgpu-drv-dgpu_safe.export
+++ b/libs/dgpu/libnvgpu-drv-dgpu_safe.export
@@ -1,4 +1,4 @@
-# Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+# Copyright (c) 2020-2021, NVIDIA CORPORATION.  All rights reserved.
 
 bitmap_find_next_zero_area
 fb_gv11b_write_mmu_fault_buffer_get
@@ -716,6 +716,7 @@ nvgpu_sgt_get_gpu_addr
 nvgpu_sgt_get_ipa
 nvgpu_sgt_get_next
 nvgpu_sgt_get_phys
+nvgpu_sgt_get_length
 nvgpu_sgt_iommuable
 nvgpu_sgt_ipa_to_pa
 nvgpu_spinlock_acquire
diff --git a/libs/igpu/libnvgpu-drv-igpu_safe.export b/libs/igpu/libnvgpu-drv-igpu_safe.export
index 31f6dc20b..e52b00bca 100644
--- a/libs/igpu/libnvgpu-drv-igpu_safe.export
+++ b/libs/igpu/libnvgpu-drv-igpu_safe.export
@@ -1,4 +1,4 @@
-# Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
+# Copyright (c) 2019-2021, NVIDIA CORPORATION.  All rights reserved.
 
 bitmap_find_next_zero_area
 fb_gv11b_write_mmu_fault_buffer_get
@@ -731,6 +731,7 @@ nvgpu_sgt_get_gpu_addr
 nvgpu_sgt_get_ipa
 nvgpu_sgt_get_next
 nvgpu_sgt_get_phys
+nvgpu_sgt_get_length
 nvgpu_sgt_iommuable
 nvgpu_sgt_ipa_to_pa
 nvgpu_spinlock_acquire
diff --git a/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c b/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
index d977cc832..a2540a735 100644
--- a/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
+++ b/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -94,6 +94,11 @@ int test_nvgpu_sgt_basic_apis(struct unit_module *m, struct gk20a *g,
 		ret = UNIT_FAIL;
 	}
 
+	if (nvgpu_sgt_get_length(sgt, sgt->sgl) != SZ_1M) {
+		unit_err(m, "%s: nvgpu_sgt_get_length incorrect\n", __func__);
+		ret = UNIT_FAIL;
+	}
+
 	p->mm_sgt_is_iommuable = false;
 	if (nvgpu_sgt_iommuable(g, sgt) != p->mm_sgt_is_iommuable) {
 		unit_err(m, "%s: nvgpu_sgt_iommuable wrong, expected %s\n",
diff --git a/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.h b/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.h
index c04395eaa..b6458e1a6 100644
--- a/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.h
+++ b/userspace/units/mm/nvgpu_sgt/nvgpu_sgt.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -41,7 +41,8 @@ struct unit_module;
  *
  * Targets: nvgpu_mem_posix_create_from_list, nvgpu_sgt_create_from_mem,
  * nvgpu_sgt_get_phys, nvgpu_sgt_get_dma, nvgpu_sgt_iommuable,
- * nvgpu_sgt_get_gpu_addr, nvgpu_sgt_get_ipa, nvgpu_sgt_ipa_to_pa
+ * nvgpu_sgt_get_gpu_addr, nvgpu_sgt_get_ipa, nvgpu_sgt_get_length,
+ * nvgpu_sgt_ipa_to_pa
  *
  * Input: None
  *
@@ -55,6 +56,8 @@ struct unit_module;
  *   set to the VA set in the nvgpu_mem.
  * - Test nvgpu_sgt_get_dma by passing in the sgl from sgt above, and verify
  *   correct DMA address is returned.
+ * - Test nvgpu_sgt_get_length by passing in the sgl from sgt above, and verify
+ *   correct sgl length is returned.
  * - Test nvgpu_sgt_iommuable.
  *   - Call nvgpu_sgt_iommuable() and verify returned value maches what is set
  *     posix struct member mm_sgt_is_iommuable.
@@ -162,4 +165,4 @@ int test_nvgpu_sgt_alignment_non_iommu(struct unit_module *m,
 int test_nvgpu_sgt_alignment_with_iommu(struct unit_module *m,
 					       struct gk20a *g, void *args);
 
-#endif /* UNIT_NVGPU_SGT_H */
\ No newline at end of file
+#endif /* UNIT_NVGPU_SGT_H */