diff --git a/drivers/gpu/nvgpu/common/grmgr/grmgr.c b/drivers/gpu/nvgpu/common/grmgr/grmgr.c index a16abe573..388e31380 100644 --- a/drivers/gpu/nvgpu/common/grmgr/grmgr.c +++ b/drivers/gpu/nvgpu/common/grmgr/grmgr.c @@ -30,6 +30,7 @@ #include #include #include +#include int nvgpu_init_gr_manager(struct gk20a *g) { @@ -211,6 +212,15 @@ int nvgpu_init_gr_manager(struct gk20a *g) */ if (g->mig.usable_gr_syspipe_instance_id[0U] == gr_dev->inst_id) { + /* + * Enable this errata for chip GA10X_NEXT. + */ + if (nvgpu_is_errata_present(g, NVGPU_ERRATA_3690950)) { + if (g->ops.mc.gr1_out_of_reset != NULL) { + g->ops.mc.gr1_out_of_reset(g, gr_dev->type, true); + } + } + continue; } diff --git a/drivers/gpu/nvgpu/hal/mc/mc_ga10b.h b/drivers/gpu/nvgpu/hal/mc/mc_ga10b.h index 4462ee450..467dc12b6 100644 --- a/drivers/gpu/nvgpu/hal/mc/mc_ga10b.h +++ b/drivers/gpu/nvgpu/hal/mc/mc_ga10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -30,6 +30,8 @@ struct gk20a; +int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx, + u32 poll_val); int ga10b_mc_enable_units(struct gk20a *g, u32 units, bool enable); int ga10b_mc_enable_dev(struct gk20a *g, const struct nvgpu_device *dev, bool enable); diff --git a/drivers/gpu/nvgpu/hal/mc/mc_ga10b_fusa.c b/drivers/gpu/nvgpu/hal/mc/mc_ga10b_fusa.c index 4721571ec..e120b684f 100644 --- a/drivers/gpu/nvgpu/hal/mc/mc_ga10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/mc/mc_ga10b_fusa.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -69,7 +69,7 @@ * register. */ -static int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx, +int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx, u32 poll_val) { u32 reg_val; diff --git a/drivers/gpu/nvgpu/include/nvgpu/errata.h b/drivers/gpu/nvgpu/include/nvgpu/errata.h index 4de162cdd..b0a80dae9 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/errata.h +++ b/drivers/gpu/nvgpu/include/nvgpu/errata.h @@ -35,6 +35,8 @@ struct gk20a; /** @cond DOXYGEN_SHOULD_SKIP_THIS */ #define ERRATA_FLAGS_NEXT \ + /* GA10X_NEXT */ \ + DEFINE_ERRATA(NVGPU_ERRATA_3690950, "GA10X_NEXT", "Get GR1 out of reset"), /** @endcond DOXYGEN_SHOULD_SKIP_THIS */ /* diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/mc.h b/drivers/gpu/nvgpu/include/nvgpu/gops/mc.h index e3cabfb37..d42fc0010 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/mc.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/mc.h @@ -288,6 +288,19 @@ struct gops_mc { void (*elpg_enable)(struct gk20a *g); bool (*intr_get_unit_info)(struct gk20a *g, u32 unit); + /** + * @brief To bring dummy GR1 engine out of reset in GA10X_NEXT. + * + * @param g [in] The GPU driver struct. + * @param devtype [in] Type of device. + * @param enable [in] Action to perform. + * + * This function is invoked to disable and enable the GR1 as part of + * SW reset for GA10X_NEXT. + * + */ + void (*gr1_out_of_reset)(struct gk20a *g, u32 devtype, bool enable); + /** @endcond DOXYGEN_SHOULD_SKIP_THIS */ };