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gpu: nvgpu: vgpu: add new attributes

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Add support for reading num FBPs and FBP enable mask.

Bug 1621056

Change-Id: I92ec1123373308ed280d4ffd30fe77ae6073ac45
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/715826
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Aingara Paramakuru
2015-03-10 11:17:05 -04:00
committed by Dan Willemsen
parent fdb92d41af
commit f45d33e5f2
2 changed files with 33 additions and 1 deletions
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30
drivers/gpu/nvgpu/vgpu/gr_vgpu.c
View File

@@ -629,6 +629,34 @@ static u32 vgpu_gr_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
return 0x1; return 0x1;
} }
static u32 vgpu_gr_get_max_fbps_count(struct gk20a *g)
{
struct gk20a_platform *platform = gk20a_get_platform(g->dev);
u32 max_fbps_count = 0;
gk20a_dbg_fn("");
if (vgpu_get_attribute(platform->virt_handle,
TEGRA_VGPU_ATTRIB_NUM_FBPS, &max_fbps_count))
gk20a_err(dev_from_gk20a(g), "failed to retrieve num fbps");
return max_fbps_count;
}
static u32 vgpu_gr_get_fbp_en_mask(struct gk20a *g)
{
struct gk20a_platform *platform = gk20a_get_platform(g->dev);
u32 fbp_en_mask = 0;
gk20a_dbg_fn("");
if (vgpu_get_attribute(platform->virt_handle,
TEGRA_VGPU_ATTRIB_FBP_EN_MASK, &fbp_en_mask))
gk20a_err(dev_from_gk20a(g), "failed to retrieve fbp en mask");
return fbp_en_mask;
}
static void vgpu_remove_gr_support(struct gr_gk20a *gr) static void vgpu_remove_gr_support(struct gr_gk20a *gr)
{ {
gk20a_dbg_fn(""); gk20a_dbg_fn("");
@@ -748,4 +776,6 @@ void vgpu_init_gr_ops(struct gpu_ops *gops)
gops->gr.get_zcull_info = vgpu_gr_get_zcull_info; gops->gr.get_zcull_info = vgpu_gr_get_zcull_info;
gops->gr.detect_sm_arch = vgpu_gr_detect_sm_arch; gops->gr.detect_sm_arch = vgpu_gr_detect_sm_arch;
gops->gr.get_gpc_tpc_mask = vgpu_gr_get_gpc_tpc_mask; gops->gr.get_gpc_tpc_mask = vgpu_gr_get_gpc_tpc_mask;
gops->gr.get_max_fbps_count = vgpu_gr_get_max_fbps_count;
gops->gr.get_fbp_en_mask = vgpu_gr_get_fbp_en_mask;
} }

4
include/linux/tegra_vgpu.h
View File

@@ -85,7 +85,9 @@ enum {
TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT, TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT,
TEGRA_VGPU_ATTRIB_PMC_BOOT_0, TEGRA_VGPU_ATTRIB_PMC_BOOT_0,
TEGRA_VGPU_ATTRIB_L2_SIZE, TEGRA_VGPU_ATTRIB_L2_SIZE,
TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH,
TEGRA_VGPU_ATTRIB_NUM_FBPS,
TEGRA_VGPU_ATTRIB_FBP_EN_MASK
}; };
struct tegra_vgpu_attrib_params { struct tegra_vgpu_attrib_params {