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gpu: nvgpu: unit: mm: add coverage & traceability
This patch adds new tests to improve test coverage. Also, updating test target tags to increase traceability. Jira NVGPU-4780 Change-Id: I87341efa3fa7d741f7abb611ff28ad6d5e1c6880 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279644 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
4bcd419a0b
commit
f46c3064ed
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -179,7 +179,8 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
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return UNIT_SUCCESS;
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}
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int test_env_init(struct unit_module *m, struct gk20a *g, void *args)
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int test_env_init_flush_gk20a_fusa(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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g->log_mask = 0;
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@@ -422,7 +423,8 @@ done:
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return ret;
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}
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int test_env_clean(struct unit_module *m, struct gk20a *g, void *args)
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int test_env_clean_flush_gk20a_fusa(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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g->log_mask = 0;
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@@ -432,7 +434,7 @@ int test_env_clean(struct unit_module *m, struct gk20a *g, void *args)
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}
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struct unit_module_test mm_flush_gk20a_fusa_tests[] = {
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UNIT_TEST(env_init, test_env_init, NULL, 0),
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UNIT_TEST(env_init, test_env_init_flush_gk20a_fusa, NULL, 0),
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UNIT_TEST(mm_fb_flush_s0, test_gk20a_mm_fb_flush, (void *)F_GK20A_FB_FLUSH_DEFAULT_INPUT, 0),
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UNIT_TEST(mm_fb_flush_s1, test_gk20a_mm_fb_flush, (void *)F_GK20A_FB_FLUSH_GET_RETRIES, 0),
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UNIT_TEST(mm_fb_flush_s2, test_gk20a_mm_fb_flush, (void *)F_GK20A_FB_FLUSH_PENDING_TRUE, 0),
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@@ -451,7 +453,7 @@ struct unit_module_test mm_flush_gk20a_fusa_tests[] = {
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UNIT_TEST(mm_l2_invalidate_s2, test_gk20a_mm_l2_invalidate, (void *)F_GK20A_L2_INVALIDATE_OUTSTANDING_TRUE, 0),
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UNIT_TEST(mm_l2_invalidate_s3, test_gk20a_mm_l2_invalidate, (void *)F_GK20A_L2_INVALIDATE_GET_RETRIES_NULL, 0),
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UNIT_TEST(mm_l2_invalidate_s4, test_gk20a_mm_l2_invalidate, (void *)F_GK20A_L2_INVALIDATE_NVGPU_POWERED_OFF, 0),
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UNIT_TEST(env_clean, test_env_clean, NULL, 0),
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UNIT_TEST(env_clean, test_env_clean_flush_gk20a_fusa, NULL, 0),
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};
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UNIT_MODULE(flush_gk20a_fusa, mm_flush_gk20a_fusa_tests, UNIT_PRIO_NVGPU_TEST);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -33,7 +33,7 @@ struct unit_module;
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*/
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/**
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* Test specification for: test_env_init
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* Test specification for: test_env_init_flush_gk20a_fusa
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*
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* Description: Initialize environment for MM tests
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*
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@@ -49,7 +49,8 @@ struct unit_module;
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_env_init(struct unit_module *m, struct gk20a *g, void *args);
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int test_env_init_flush_gk20a_fusa(struct unit_module *m, struct gk20a *g,
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void *args);
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/**
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* Test specification for: test_gk20a_mm_fb_flush
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@@ -130,7 +131,7 @@ int test_gk20a_mm_l2_invalidate(struct unit_module *m, struct gk20a *g,
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void *args);
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/**
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* Test specification for: test_env_clean
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* Test specification for: test_env_clean_flush_gk20a_fusa
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*
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* Description: Cleanup test environment
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*
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@@ -146,7 +147,8 @@ int test_gk20a_mm_l2_invalidate(struct unit_module *m, struct gk20a *g,
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_env_clean(struct unit_module *m, struct gk20a *g, void *args);
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int test_env_clean_flush_gk20a_fusa(struct unit_module *m, struct gk20a *g,
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void *args);
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/** @} */
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#endif /* UNIT_MM_HAL_CACHE_FLUSH_GK20A_FUSA_H */
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -178,7 +178,8 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
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return UNIT_SUCCESS;
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}
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int test_env_init(struct unit_module *m, struct gk20a *g, void *args)
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int test_env_init_flush_gv11b_fusa(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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g->log_mask = 0;
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@@ -284,7 +285,8 @@ done:
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return ret;
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}
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int test_env_clean(struct unit_module *m, struct gk20a *g, void *args)
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int test_env_clean_flush_gv11b_fusa(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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g->log_mask = 0;
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@@ -295,14 +297,14 @@ int test_env_clean(struct unit_module *m, struct gk20a *g, void *args)
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}
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struct unit_module_test mm_flush_gv11b_fusa_tests[] = {
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UNIT_TEST(env_init, test_env_init, (void *)0, 0),
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UNIT_TEST(env_init, test_env_init_flush_gv11b_fusa, NULL, 0),
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UNIT_TEST(mm_l2_flush_s0, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_PASS_BAR1_BIND_NOT_NULL, 0),
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UNIT_TEST(mm_l2_flush_s1, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_PASS_BAR1_BIND_NULL, 0),
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UNIT_TEST(mm_l2_flush_s2, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_FB_FLUSH_FAIL, 0),
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UNIT_TEST(mm_l2_flush_s3, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_L2_FLUSH_FAIL, 0),
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UNIT_TEST(mm_l2_flush_s4, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_TLB_INVALIDATE_FAIL, 0),
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UNIT_TEST(mm_l2_flush_s5, test_gv11b_mm_l2_flush, (void *)F_GV11B_L2_FLUSH_FB_FLUSH2_FAIL, 0),
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UNIT_TEST(env_clean, test_env_clean, NULL, 0),
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UNIT_TEST(env_clean, test_env_clean_flush_gv11b_fusa, NULL, 0),
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};
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UNIT_MODULE(flush_gv11b_fusa, mm_flush_gv11b_fusa_tests, UNIT_PRIO_NVGPU_TEST);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -33,7 +33,7 @@ struct unit_module;
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*/
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/**
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* Test specification for: test_env_init
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* Test specification for: test_env_init_flush_gv11b_fusa
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*
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* Description: Initialize environment for MM tests
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*
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@@ -49,7 +49,8 @@ struct unit_module;
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_env_init(struct unit_module *m, struct gk20a *g, void *args);
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int test_env_init_flush_gv11b_fusa(struct unit_module *m, struct gk20a *g,
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void *args);
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/**
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* Test specification for: test_gv11b_mm_l2_flush
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@@ -80,7 +81,7 @@ int test_env_init(struct unit_module *m, struct gk20a *g, void *args);
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int test_gv11b_mm_l2_flush(struct unit_module *m, struct gk20a *g, void *args);
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/**
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* Test specification for: test_env_clean
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* Test specification for: test_env_clean_flush_gv11b_fusa
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*
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* Description: Cleanup test environment
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*
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@@ -96,7 +97,8 @@ int test_gv11b_mm_l2_flush(struct unit_module *m, struct gk20a *g, void *args);
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* Output: Returns SUCCESS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_env_clean(struct unit_module *m, struct gk20a *g, void *args);
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int test_env_clean_flush_gv11b_fusa(struct unit_module *m, struct gk20a *g,
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void *args);
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/** @} */
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#endif /* UNIT_MM_HAL_CACHE_FLUSH_GV11B_FUSA_H */
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